Patent
1993-03-30
1994-12-20
Jankus, Almis
395128, 395131, 395133, G06F 1562
Patent
active
053751965
ABSTRACT:
Three terms (X,Y,"Error") are combined in a single floating-point number in an advanced microprocessor to compute pixel addresses. The floating-point number is reconverted to integer form in multiplexers operating in a mode determined by slope, relative to unity, of the line to be defined by the pixels. The output of the multiplexers is enhanced by a look-up table to produce color data, which are converted to analog form for display. Speed of operation is greatly augmented by the use of floating-point arithmetic to compute the pixel addresses.
REFERENCES:
patent: 4878182 (1989-10-01), Aranda et al.
patent: 4924415 (1990-05-01), Winser
patent: 5185599 (1993-02-01), Doornink et al.
Duckworth Mark R.
Hammond Robert L.
Vatti Bala R.
CalComp Inc.
Crooks Robert G.
Jankus Almis
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