Randomly accessible memory having time overlapping memory access

Details Randomly accessible memory having time overlapping memory access Randomly accessible memory having time overlapping memory access

1993-08-31

1994-11-22

Callahan, Timothy P.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523005, 36523006, 36523008, 36518904, 36518905, 365193, G11C 800, G11C 700

Patent

active

053674944

ABSTRACT:
A memory device (28) executes memory access operations of two or more storage locations concurrently. The memory device (28) is comprised of a plurality of memory bank decode logic circuits (30, 32, 56) and a plurality of memory banks (34, 52). Each of the decode logic circuits decodes a first information and control signal set to enable a first memory bank to begin and complete a memory access operation. Each memory bank is comprised of a plurality of latch circuits (39,40, 42, 50) to store a predetermined information and control signal set necessary to perform the memory access operation. A second control signal and information set may, therefore, enable a second memory bank within the memory device (28) to perform a second memory access operation concurrently in time with the first memory access operation.

REFERENCES:
patent: 5012408 (1991-04-01), Conroy
patent: 5036493 (1991-07-01), Nielsen
patent: 5060145 (1991-10-01), Scheuneman et al.
patent: 5150330 (1992-09-01), Hag

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