Random pattern lock and key fault detection scheme for microproc

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371 62, 361 62, G06F 1104

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046495371

ABSTRACT:
A microprocessor-based electronic control unit utilizes a random pattern lock and key failure detection scheme to detect failures in the system being controlled or the control unit itself. The microprocessor system is programmed to receive a random data word, to output the same data word, and to perform a variety of tests which result in the generation of a data stream having a particular relationship to the random data word such that the data stream and the random data word bits can be combined to form a predetermined data word that is needed to maintain microprocessor control of the associated electrical system. If the microprocessor fails to generate a data stream which results in the formation of the proper predetermined data word, the control unit output will be locked into a predetermined state.

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Carnes, M. L. et al., "Processor Checking", IBM Tech. Discl. Bulletin, vol. 17, No. 11, Apr. 1975.
Tomas, W. M. et al., "Automatic Lay-Out Analysis," IBM Tech. Discl. Bulletin, vol. 10, No. 10, Mar. 1968.

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