Random number generating circuit

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Details

C708S251000, C708S255000

Reexamination Certificate

active

07979481

ABSTRACT:
Provided is a random number generating circuit having a simple circuit structure, for generating a physical random number based on a noise. The random number generating circuit includes a reference voltage section, an inverting amplifier section having a threshold voltage equal to a reference voltage level, and a semiconductor switch provided between an output terminal of the reference voltage section and an input terminal of the inverting amplifier section. A thermal noise produced from the reference voltage section is held by the semiconductor switch and a capacitor and amplified by the inverting amplifier section to generate the physical random number.

REFERENCES:
patent: 6571263 (2003-05-01), Nagai
patent: 7007060 (2006-02-01), Miller, Jr.
patent: 7243117 (2007-07-01), Yamamoto et al.
patent: 7401108 (2008-07-01), Miller, Jr.
patent: 2001-175458 (2001-06-01), None
patent: 2001175458 (2001-06-01), None
Wee, Keng Hoong; Shibata, Tadashi; Ohmi, Tadahiro; “A Simple Random Noise Generator Employing Metal-Oxide-Semiconductor-Field-Effect-Transistor Channel kT/C Noise and Low-Capacitance Loading Buffer”, Japanese Journal of Applied Physics, vol. 40, Issue 7, pp. 4501-4507, 2001.
Ali Tangel and Kyusun Choi, “The CMOS Inverter as a Comparator in ADC Designs”, Analog Integrated Circuits and Signal Processing, vol. 39, Issue 2, pp. 147-155, May 2004.

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