Random interleaving dither for sigma-delta analog-to-digital...

Details Random interleaving dither for sigma-delta analog-to-digital... Random interleaving dither for sigma-delta analog-to-digital...

2005-12-13

2005-12-13

Le, Don (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Increasing converter resolution

C341S143000, C341S155000

Reexamination Certificate

active

06975255

ABSTRACT:
A dithering method is provided for sigma-delta converters in a deep-submicron process. The dither is a random interleaving of quantizer thresholds levels. The random interleaving dither is more effective than previous static dither methods to remove idle channel tones of sigma-delta analog-to-digital converters (ADC). The dither is easy to implement and takes less area than other dynamic dither methods.

REFERENCES:
patent: 6049299 (2000-04-01), Lunacek et al.
patent: 6331831 (2001-12-01), Cvetkovic et al.
patent: 6825784 (2004-11-01), Zhang
Norsworthly et al “A 14-Bit 80kHz Sigma-Delta A/D Converter:Modeling, Design, and Performance Evaluation” IEEE Journal of Solid-State Circuit vol. 24, No. 2, Apr., 1998, pp 256-266.
Norsworthy et al “Delta Sigma Data Converters Theory, Design and Simulation” IEEE Circuits & Systems Society, pp98-108 (no date).
Norsworth et al. “Effective Dithering of Sigma Delta Modulations” IEEE 1992 pp 1304-1307 (no date).
Gomez “A 102-db Spurious-Free DR EA ADC Using a Dynamic Dither Scheme” IEEE Transactions on Circuit & Systems, vol. 47, Jun. 2000, pp 531-535.

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