Random generator description

Cryptography – Key management – Having particular key generator

Reexamination Certificate

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Details

C380S263000, C380S268000

Reexamination Certificate

active

10188139

ABSTRACT:
A pseudo random generator comprising a shift register comprising a first flip flop (F0) and n further flip-flops (F1. . . Fn) each flip-flop (F0) having a D input, a non-inverting output, an inverting output, and a common clock (fclk) input and the first flip-flop (F0) having a set input, each of the non-inverting outputs being connected via a NOR gate (10) to the set input of the first flip-flop (F0) and each of the non-inverting outputs of the flip-flops (F0. . . Fn) being connected to the input of the first flip-flop (F0) via an XOR gate (11), characterised in that the generator comprises at least one additional logic gate (13, 14, 15; 17, 18, 19) including at least one additional flip-flop (14;18).The extra logic gates may comprise gated to toggle between the inverting end and the non-inverting outputs, or to generate an extra ‘0’ at the output or to chop, preferably randomly, the input signal.

REFERENCES:
patent: 4911552 (1990-03-01), Kurashige et al.
patent: 6414558 (2002-07-01), Ryan et al.

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