Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-06-15
2008-11-04
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S191000, C365S233130, C365S233100
Reexamination Certificate
active
07447107
ABSTRACT:
A random access memory including multiple state machines and selection circuitry. The multiple state machines include a first state machine and a second state machine, and possibly more state machines. The first state machine is configured to provide first signals to control the random access memory and provide first command operations and the second state machine is configured to provide second signals to control the random access memory and provide second command operations. The selection circuitry selects one of the multiple state machines. The selection circuitry conducts the first signals to select the first state machine and provide the first command operations and the selection circuitry conducts the second signals to select the second state machine and provide the second command operations.
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Dicke Billig & Czaja, PLLC
Le Thong Q
Qimonda North America Corp.
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