Random access memory device with columns of redundant memory cel

Details Random access memory device with columns of redundant memory cel Random access memory device with columns of redundant memory cel

1992-09-10

1994-03-08

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Plural blocks or banks

365200, 371 103, G11C 700

Patent

active

052933482

ABSTRACT:
A random access memory device has at least one column of redundant memory cells for replacing a column of defective regular memory cells therewith, and a block address decoder circuit selects one of regular memory cell blocks on the basis of block address bits in so far as excellent regular memory cell is accessed; however, if one of the defective regular memory cells is accessed, the block decoder circuit selects a regular memory cell block associated with the at least one column of redundant memory cells regardless of the block address bits so that any separate row address decoder circuit and any separate sense amplifier/ write driver circuit are not required for the at least one column of redundant memory cells, thereby decreasing the peripheral circuits.

REFERENCES:
patent: 4908798 (1990-03-01), Urai
patent: 4918662 (1990-04-01), Kondo
patent: 4935899 (1990-06-01), Morigami

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