Random access memory device and method of controlling same in pi

Details Random access memory device and method of controlling same in pi Random access memory device and method of controlling same in pi

1992-06-05

1993-10-05

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

36518905, 365233, 3652385, G11C 700

Patent

active

052511812

ABSTRACT:
A random access memory device is provided with data hold circuits connected midway between a column address write circuit and a column select circuit, between a sense amplifier circuit for amplifying data read from the selected column and a data output circuit, between a write data input circuit and a selected column line, respectively. In data write operation, all the data hold circuits are activated at appropriate timings. In data read operation, all but the data hold circuit connected midway between the column address write circuit and the column select circuit are activatged. In both cases, a data is written to the cell, is outputted in the succeeding cycle after the cycle during which the address data is written. Therefore, data transfer operation is executed in sequence through the routes separated by the data hold circuits, thus enabling the higher speed and more efficient data read and write operation.

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