Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-08-23
2005-08-23
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185220
Reexamination Certificate
active
06934190
ABSTRACT:
Methods of operating dual bit memory devices including programming with a range of values are provided. The present invention employs a range of ramp source program pulses to iteratively perform a program operation that employs hot hole injection. The range is related to channel lengths of individual dual bit memory cells within the memory device. To program a bit of a particular dual bit memory cell, a negative gate program voltage is applied to its gate, a positive drain voltage is applied to its acting drain, and its substrate is connected to ground. Additionally, a ramp source voltage of the range of ramp source program pulses is concurrently applied to an acting source of the dual bit memory cell. A verification operation is then performed and the programming is repeated with a decremented ramp source voltage on verification failure.
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Haddad Sameer
He Yi
Liu Zengtao
Liu Zhizheng
Randolph Mark
Advanced Micro Devices , Inc.
Eschweiler & Associates LLC
Le Vu A.
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