Ramp circuit for control loop

Details Ramp circuit for control loop Ramp circuit for control loop

1988-07-01

1990-12-18

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307260, 307261, 307263, 307549, H03K 408, H03K 501, H03B 109

Patent

active

049788663

ABSTRACT:
A ramp circuit for a control loop which receives a signal from a controller and sends a signal to a controllable means to limit the slew rate of the controller signal. A capacitor functions as a storage means and a reset means is provided to rapidly discharge the capacitor in the event of a decrease in power to the control loop. The capacitor is charged through a diode which limits discharge in normal operation. The discharge and reset is performed by a normally reverse biased diode and series resistance connected to the controller positive supply voltage. A current limiting means is provided to charge the capacitor a lower linear rate by turning on a transistor and shunting excess current around the capacitor. An external reset is provided by an additional diode and series resistance for connection to a remote positive supply voltage or relay contact. The output is buffered by an emitter follower to limit loading by the controllable means and protection circuitry to provide immunity to induced electrical currents at the output.

REFERENCES:
patent: 3058013 (1962-10-01), Acker

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