RAM-search processor for intersymbol interference cancellation

Pulse or digital communications – Receivers – Interference or noise reduction

Reexamination Certificate

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C375S233000, C360S065000

Reexamination Certificate

active

06532272

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention (Technical Field)
The present invention relates to the reduction of intersymbol interference that occurs in closely-spaced data symbols in data transmission and data storage channels.
2. Background Art
One negative consequence of ever-increasing (linear) recording densities is the ubiquitous nonlinear distortion arising from closely-spaced recorded transitions. Among the dominant effects are partial erasure, for magneto-inductive heads, pulse asymmetry and saturation, for magneto-resistive heads, and transition shifting for both.
A number of methods for mitigating against nonlinear intersymbol interference (ISI) have been examined in recent years, including the random access memory-decision feedback equalizer (RAM-DFE), various RAM ISI-cancellers, various sequence detectors, neural network-based ISI-cancellers and Volterra equalizers. All of these techniques suffer from either high complexity or marginal effectiveness.
Communications through nonlinear ISI channels continues to be of great interest as available spectrum becomes scarce, pushing for greater bandwidth efficiency. Additionally, the need for power efficiency, such as for hand-held wireless devices or satellite transponders, often requires the use of power amplifiers running in the saturation region. Unfortunately, within such a bandlimited nonlinear environment, typical methods to increase data rate such as faster symbol rates or higher order modulation schemes suffer greatly. In many nonlinear channels, the distortion caused by the nonlinear element, such as a nonlinear power amplifier and bandlimiting filters, creates nonlinear ISI. Such distortion typically limits the system to low order constellations such as PSK. Higher order constellations are possible only if effective reduction of the nonlinear ISI is achieved.
Various proposed solutions have varying degrees of success. One method proposed adaptively predistorting the transmitted signal in such a way that the desired constellation is achieved after passing through the nonlinearity. While this is effective, it requires additional hardware, essentially a receiver, in the transmitter. Such additional hardware is a disadvantage for many power/size limited transmitters.
Other solutions focus on receive-side signal processing, and others have proposed the use of nonlinear equalizers in the form of Volterra filters. While these may be effective, the potentially large parameter space and sensitivity to noise remains an issue in some applications. The technique of the present invention is robust in the presence of channel noise, requires no additional transmit hardware, and has modest receiver hardware needs. The present invention builds upon work in the magnetic storage channel and digital communications fields to essentially extend the random access memory-decision feedback equalizer (RAM-DFE) idea to reduce “precursor” nonlinear ISI components. The “precursor” effects can be significant. Further, since a trellis detector or decoder is usually involved, the present invention incorporates the RAM into the trellis detector or decoder.
The present invention provides a unique approach to addressing the problem of ISI. A subset of RAM inputs is searched for the ISI yielding a minimum branch metric error. In the preferred embodiment, a RAM search method is used in cooperation with a Viterbi detector. The present invention is also compatible with Viterbi decoding, when the application is a communication channel with convolutional coding, and with BCJR-APP (acronym known to those of ordinary skill in the error-correcting codes art for “Bahl, Cocke, Jelinek and Raviv—A Posteriori Probabilities”, as set forth in L. R. Bahl, et al., “Optimal Decoding of Linear Codes for Minimizing Symbol Error Rate”, IEEE Trans. Info. Theory, Vol IT-20, pp. 284-287, March 1974) detection and decoding when the application involves turbo codes.
Prior patents that disclose related technology include: U.S. Pat. No. 5,430,661, to Fisher et al., entitled “Adaptive Decision Feedback Equalizer Apparatus for Processing Information Stored on Digital Storage Media;” U.S. Pat. No. 5,132,988, to Fisher et al., entitled “Adaptive Decision Feedback Equalizer Apparatus for Processing Information Stored on Digital Storage Media;” U.S. Pat. No. 5,426,541, to Coker et al., entitled “Self-Equalization Method for Partial-Response Maximum-Likelihood Disk Drive Systems;” U.S. Pat. No. 5,418,660, to Sato et al., entitled “Information Processing Apparatus for Processing Reproduction Signal Having Nonlinear Characteristics;” U.S. Pat. No. 5,414,571, to Matsushige et al., entitled “Adaptive Equalization Circuit for Magnetic Recording Apparatus Having High Error Immunity;” U.S. Pat. No. 5,703,903, to Blanchard et al., entitled “Method and Apparatus for Adaptive Filtering in a High Interference Environment;” U.S. Pat. No. 5,742,642, to Fertner, entitled “Signal Processing Method and Apparatus for Reducing Equalizer Error;” U.S. Pat. No. 4,852,090, to Borth, entitled “TDMA Communications System with Adaptive Equalization;” U.S. Pat. No. 5,107,378, to Cronch et al., entitled “Adaptive Magnetic Recording and Readback System;” and U.S. Pat. No. 5,166,914, to Shimada et al., entitled “Data Recording/Reproducing Apparatus with Two-Dimensional Equalizer for Crosstalk Cancellation.” These references provide related technologies, however most do not utilize RAM-DFE techniques. The '661 and '988 patents to Fisher et al., disclose the use of a decision feedback equalizer; however, they introduce a design of a RAM-DFE that is capable only of mitigating the nonlinear ISI caused by post-cursor symbols. This would be effective when most of the nonlinear ISI is post-cursor, but when the precursor nonlinear ISI is significant, its effectiveness becomes marginal. The present invention introduces a solution to this problem by searching over all possible combinations of the precursor symbols while fixing the post-cursor symbols to past decisions. Then, the combination that gives the optimal branch metric is used, along with the post-cursor samples, to address the RAM. This method is termed RAM-search because it borrows the notion of employing a RAM from the RAM-DFE, and because it involves a search. The preferred embodiment of the present invention is termed the RAM-search-Viterbi-detector (RS-VD). The RS-VD uses a RAM-search method in cooperation with a Viterbi algorithm. This algorithm shows a considerable performance improvement in the bit error rate over other algorithms. This is due to the fact that post-cursor symbols are more reliable, and the error propagation is reduced. In summary, the present invention cancels both precursor and post-cursor linear and nonlinear ISI.
SUMMARY OF THE INVENTION (DISCLOSURE OF THE INVENTION)
The present invention is a method of canceling intersymbol interference (ISI) for a signal bit a
k
at time k, where k&egr;{0, ±1, ±2 . . . } in data transmission and data storage channels, such as in magnetic recording, optical recording, image processing, image coding, satellite communications, wireline communications such as telephone lines, and wireless communications such as digital cellular telephones. The method is comprised of the steps of modelling the channel; training a RAM with known values for a
k
to acquire the model of the channel; searching for the optimal address for the RAM with past, present and future values of a
k
that will be used to cancel the ISI in the received signal; and canceling the ISI from the received signal. The training step comprises training with a training update algorithm. The modelling step can comprise modelling with a simple partial erasure model to produce a discrete time signal. The training step can comprise acquiring a model for a magneto-inductive head or a magneto-resistive head, or some other nonlinear channel model. The method can further comprise the step of equalizing the discrete time signal to a desired partial response target. Equalizing can be accomplished with either a

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