Ram row decode circuitry that utilizes a precharge circuit that

Details Ram row decode circuitry that utilizes a precharge circuit that Ram row decode circuitry that utilizes a precharge circuit that

1996-06-18

1996-11-12

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365203, 326106, G11C 800

Patent

active

055746985

ABSTRACT:
A precharge circuit which is deactivated once a word line driver is activated. Specifically, a low output signal created by the selected driver is fed back to the precharge circuit to deactivate the precharge circuit during activation of a chosen word line.

REFERENCES:
patent: 4897568 (1990-01-01), Chern et al.
patent: 5132575 (1992-07-01), Chern
patent: 5206551 (1993-04-01), Chern
patent: 5245578 (1993-09-01), McLaury
patent: 5293342 (1994-03-01), Casper et al.
patent: 5302870 (1994-04-01), Chern
patent: 5311481 (1994-05-01), Casper et al.
patent: 5400283 (1995-03-01), Raad

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