RAM line storage for fixed pattern noise correction

Details RAM line storage for fixed pattern noise correction RAM line storage for fixed pattern noise correction

1998-04-23

2002-10-29

Ho, Tuan (Department: 2612)

Television

Camera, system and detail

Combined image signal generator and general image signal...

C348S243000

Reexamination Certificate

active

06473124

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention describes a line storage system for fixed pattern noise correction in an active pixel sensor.
Active pixel sensors are known and are typically made as described in U.S. Pat. No. 5,471,515, the disclosure of which is herewith incorporated by reference to the extent necessary for proper understanding. Such active pixel sensors include associated circuitry within each “pixel” for amplifying and processing the signal. This associated circuitry can cause certain losses and gains in the signal. The losses and gains of each circuit introduce a pattern. That pattern, which is representative of the associated circuitry, is called fixed pattern noise.
When column-parallel A/D conversion of the pixel values is used, noise is introduced by the response of each A/D converter due to device variations across a chip. Each A/D converter produces a different value because of these device variations. This compares with an ideal system where all A/D converters would produce the same result for all input signals.
SUMMARY OF THE INVENTION
According to the present invention, information indicative of a fixed pattern noise is obtained and stored. This information indicative of fixed pattern noise is then subtracted from subsequent operations to reduce the non-uniformity.


REFERENCES:
patent: 4317134 (1982-02-01), Woo et al.
patent: 5754224 (1998-05-01), Kusaka
patent: 6067113 (2000-05-01), Hurwitz et al.

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