Ram having a stabilized substrate bias and low-threshold narrow-

Details Ram having a stabilized substrate bias and low-threshold narrow- Ram having a stabilized substrate bias and low-threshold narrow-

1979-09-04

1981-04-14

Edlow, Martin H.

357 23, 357 55, 357 52, H01L 2702

Patent

active

042622980

ABSTRACT:
Disclosed is a RAM that includes a semiconductor substrate having P-type dopant impurity atoms and having a major surface. A plurality of spaced apart regions of N-type atoms lie within a predetermined area on the surface to define storage regions for the cells of the memory. An insulating layer of substantially uniform thickness with a conductive layer lying thereon completely covers the predetermined area except for a plurality of elongated openings which extend outward from each of the storage regions. A layer of P-type dopant atoms lie at substantially the same level as the storage regions throughout that portion of the substrate that is beneath the insulating layer. By this structure, the perimeter of a transfer gate that exhibits essentially no narrow channel width effect is defined from each storage region by the respective openings. Also, a capacitor for stabilizing the bias voltage of the substrate is formed by the combination of that portion of the insulating layer and conductive layer which lies between the storage regions.

REFERENCES:
patent: 4141027 (1979-02-01), Baldwin
patent: 4145233 (1979-03-01), Sefick
patent: 4158238 (1979-06-01), Erb
patent: 4183040 (1980-01-01), Rideout
patent: 4184085 (1980-01-01), Takahashi
patent: 4203125 (1980-05-01), Chatterjee

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