Ram convertible look-up table based macrocell for PLDs

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307468, 36518908, 36523006, H03K 19173

Patent

active

053529405

ABSTRACT:
A macrocell for use in programmable logic devices (PLDs) that provides for standard memory functions with minimum overhead circuitry. In a PLD that uses static random access memory (SRAM) as its configuration host, the circuit of the present invention enables the SRAM to be programmed via bidirectional look-up tables. In a user mode, macrocell bidirectional look-up table implements the configured logic, while in supervisor and memory modes the look-up table acts as an address decoder for the SRAM. A tristate buffer and two pass gates to direct data out of, and drive data into, the SRAM cells through the look-up table are the only additional circuitry required.

REFERENCES:
patent: 4831573 (1989-05-01), Norman
patent: 5128559 (1992-07-01), Steele
patent: 5136188 (1992-04-01), Ha
patent: 5258668 (1993-11-01), Cliff
patent: 5260610 (1993-11-01), Pederson
patent: 5282163 (1994-01-01), Shibata

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