Ram buffer memory circuit system for train printer-data link pro

Details Ram buffer memory circuit system for train printer-data link pro Ram buffer memory circuit system for train printer-data link pro

1980-05-07

1983-01-25

Springborn, Harvey E.

Boots, shoes, and leggings

G06F 312

Patent

active

043707300

ABSTRACT:
A specialized RAM buffer memory is provided to work in conjunction with a peripheral-controller designated as a train printer-data link processor. The RAM buffer memory has addressable locations holding two 8-bit bytes at each addressable location. Thus, each addressable location has a top byte and a bottom byte, each of which represents a graphic character. A first dedicated portion of the buffer storage memory is called the print image buffer (PIB). This buffer is loaded with character data according to the number of print columns used in the train printer. When the print image buffer is loaded with character information, it constitutes one full line of print across the 132 columns. A second dedicated area of the memory buffer is called the train image buffer (TIB). This buffer is loaded with codes for the character set that matches the current print train module used in the train printer. Typically, the train image buffer will have 288 addressable bytes corresponding to the 288 characters on the train module. Other areas of the memory buffer storage are provided to control various printing and non-printing and paper format functions.

REFERENCES:
patent: 3629848 (1971-12-01), Gibson et al.
patent: 3760366 (1973-09-01), Gregor et al.
patent: 4162520 (1979-07-01), Cook et al.
patent: 4218754 (1980-08-01), Schaeffer

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