Raised silicided source/drain electrode formation with reduced s

Details Raised silicided source/drain electrode formation with reduced s Raised silicided source/drain electrode formation with reduced s

1996-11-26

1998-11-03

Quach, T. N.

Fishing, trapping, and vermin destroying

437193, 437200, 148DIG19, H01L 21283, H01L 21335

Patent

active

058307753

ABSTRACT:
A method is provided for forming silicided source/drain electrodes in active devices wherein the electrodes have very thin junction regions. In the process silicidation material is deposited on the wafer and rapid-thermal-annealed at a temperature and for a time calculated to produce metal-rich or silicon-deficient silicide on the electrodes. The metal-rich or silicon-deficient silicide is selectively formed on the semiconductor electrodes and not on oxide or other insulating surfaces. A selective etch removes the silicidation material which has not reacted with silicon, including metal overlying insulating surfaces. Then, after cleaning the silicide surfaces, a layer of silicon is deposited over the structure and a second rapid thermal anneal is performed at a higher temperature than the first rapid thermal anneal. In the second rapid thermal anneal additional silicon from the deposited silicon layer is incorporated into the silicide converting it from metal-rich or silicon-deficient silicide into the more stable disilicide phase silicide. Upon removal of any unconsumed silicide, the disilicide contacts are completed. The process can be controlled to produce ultra-thin junction depths of less than 500 .ANG. with overlying silicide contacts of up to 1000 .ANG. or more in thickness. The result is the formation of thermally stable silicide contacts which are self-aligned with the electrodes.

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Yamada, K., et al., "Ultra-Low Contact Resistance . . . " 1994 Symp. VLSI Tech. Dig. of Tech. Papers, Jun. 1994, pp. 63-64.

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