Radio transmission system having simplified error coding circuit

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371 37, 370109, G06F 1120

Patent

active

048624578

ABSTRACT:
A digital radio transmission system comprises a transmit digital processing unit that compresses the time scale of a prescribed number of consecutive data bits for leaving a time interval between adjacent time-compressed data bits, generates an additional bit and inserts it into a portion of the time interval immediately following the time-compressed data bits to form composite bits. An error correcting encoder performs computations on the composite bits according to an encoding theorem and inserts an error correcting code into the remainder of the time interval, forming a block code. An error correcting decoder performs computations on the block code according to a decoding theorem for correcting error in the composite bits. A receive digital processing unit separates the additional bit and the time-compressed data bits of the error-corrected composite bits and expands the time scale of the separated time-compressed data bits. To ensure fast channel switching the error correcting decoder is synchronized with framing bits to minimize the effect of a timing disruption which occurs briefly if the transmit DPU of a faulty regular channel is switched to the error correcting encoder of a standby channel.

REFERENCES:
patent: 3988677 (1976-10-01), Fletcher
patent: 4238852 (1980-12-01), Iga
patent: 4365248 (1982-12-01), Bargeton
patent: 4660196 (1987-04-01), Gray
patent: 4686675 (1987-08-01), Morimoto

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