Radio receiver for vestigal-sideband amplitude-modulation...

Television – Receiver circuitry – Demodulator

Reexamination Certificate

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C348S731000, C348S729000, C348S725000, C348S500000, C348S737000, C375S319000

Reexamination Certificate

active

06512555

ABSTRACT:

The invention relates to radio receivers having the capability of receiving digital signal transmissions, such as standard-definition digital television (DTV) signals or digital high-definition television (HDTV) signals, especially when vestigial-sideband (VSB) amplitude modulation (AM) of a radio-frequency (R-F) carrier by multi-level symbol coding is employed for transmitting the digital information.
BACKGROUND OF THE INVENTION
In DTV radio receivers and similar receiver apparatus for receiving a carrier amplitude-modulated by multi-level symbol code sequences, demodulation has been done in the analog regime to reproduce the multi-level symbol code sequences at baseband, with the demodulation results subsequently being digitized. This generates a digitized baseband signal suitable for baseband equalization and for data slicing. A DTV radio receiver according to such design was used by the Grand Alliance, a group of DTV proponents including Zenith Electronics Corporation, during the development of the broadcast DTV standard published by the Advanced Television Systems Committee (ATSC) in September 1995. This standard is approved by the Federal Communications Commission (FCC) for use in terrestrial broadcasting in the United States of America.
Alternatively, radio receivers can be constructed in which an intermediate-frequency (I-F) amplitude-modulation (AM) signal developed by downconversion of a received radio-frequency AM signal is digitized and is then demodulated by synchrodyning in the digital regime. It is preferable that the digitized I-F signal be supplied as a complex signal having real and imaginary portions. These real and imaginary portions can be synchronously detected using respective orthogonal phases of a digital carrier, with these component synchronous detection results being digitally subtracted or digitally added, depending how the orthogonal phases of the digital carrier are chosen, to recover an in-phase demodulation result at baseband. These real and imaginary portions can also be synchronously detected using respective orthogonal phases of a digital carrier, with these component synchronous detection results being digitally added or digitally subtracted, depending how the orthogonal phases of the digital carrier are chosen, to recover a quadrature-phase demodulation result at baseband. In accordance with a prior art procedure, the in-phase demodulation result is developed by subtraction, and the quadrature-phase demodulation result is developed by addition. In the applications from which priority is claimed, as in this specification and its accompanying drawing, the in-phase demodulation result is developed by addition; and the quadrature-phase demodulation result is developed by subtraction.
A number of different procedures can be used for supplying the digitized I-F signal as a complex signal having real and imaginary portions. The downconversion of analog DTV signals to the final I-F band can be done using a complex mixing operation involving local oscillations supplied in two orthogonal phasings, with the analog real and imaginary components of the complex mixer output signal being digitized by respective analog-to-digital converters. To avoid the problem of two analog-to-digital converters having somewhat different conversion characteristics, the analog real and imaginary components of the complex mixer output signal can instead be digitized by a single analog-to-digital converter operated on a duplex basis. The inventors believe that approaches to supplying the digitized I-F signal as a complex signal that avoid the need for the complex mixer are more practical. The analog downconverted DTV signal is digitized before being phase-split into real and imaginary components of a complex digital final I-F signal.
The phase-splitter circuitry for supplying an imaginary portion as well as a real portion of a complex digitized final I-F signal can take a number of forms. The phase-splitter circuitry can comprise a Hilbert transform filter, for supplying the imaginary portion of said complex digitized final I-F signal in response to the digitized final I-F signal supplied from the analog-to-digital converter (ADC), and delay circuitry for supplying the real portion of the complex digitized final I-F signal in delayed response to the digitized final I-F signal supplied from the ADC. Such an approach is described by D. W. Rice and K. H. Wu in their article “Quadrature Sampling with High Dynamic Range” on pp. 736-739 of
IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS
, Vol. AES-18, No. 4 (November 1982). Alternatively, the phase-splitter circuitry can use a pair of infinite-impulse-response (IIR) filters for providing real and imaginary responses to the digitized final I-F signal supplied from the ADC. C. M. Rader describes such a procedure in his article “A Simple Method for Sampling In-Phase and Quadrature Components”,
IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS
, Vol. AES-20, No. 6 (November 1984), pp. 821-824. In yet another alternative, the phase-splitter circuitry can use a pair of finite-impulse-response (FIR) filters for providing real and imaginary responses to the digitized final I-F signal supplied from the ADC. T. F. S. Ng describes such a procedure in United Kingdom patent application 2 244 410 A published Nov. 27, 1991 and entitled QUADRATURE DEMODULATOR.
The orthogonal phases of digital carrier used in synchronous detection can be generated by digitizing carrier waves that are supplied in orthogonal phases from a beat-frequency oscillator (BFO) in the receiver. However, the orthogonal phases of digital carrier used in synchronous detection can be generated from look-up tables stored in read-only memory (ROM) addressed by an address derived from a counting of the samples in the complex digitized I-F signal. This latter arrangement is preferable, in that analog-to-digital conversion circuitry for the two phases of digital carrier can be avoided, and in that orthogonality of the two phases of digital carrier is better assured.
In the prior art, in order properly to synchrodyne the digitized final I-F signal to baseband for recovering in-phase and quadrature-phase demodulation results, the digital carrier is adjusted in frequency and phase to match the frequency and phase of the suppressed carrier of the digitized final I-F signal. It is difficult to implement the adjustment of the frequency of digital carrier supplied from ROM unless sample clock frequency is adjustable, which adjustment of sample clock frequency undesirably interferes with equalizer operation. The adjustment of digital carrier phase presents more subtle problems. When adjustment of digital carrier phase is attempted in the digital regime, the discontinuous nature of digital sampling limits the precision of such adjustments, the inventors point out. These adjustments can be made more precisely in the analog regime where signals are continuous in nature, rather than being sampled at recurrent intervals with attendant quantizing errors arising from digitization. When the orthogonal phases of digital carrier used in digital synchrodyning procedures are supplied from ROM, adjustments cannot be made in the analog regime insofar as the inventors are aware. So, cumbersome procedures for interpolation between digital carrier samples have been employed for refining the adjustment of the frequency and phase of the digital carrier.
The inventors have discerned how to avoid these problems, which are particularly difficult to solve when the orthogonal phases of digital carrier used in digital synchrodyning procedures are supplied from ROM. Rather than just adjusting the frequency and phase of the digital carrier to match the frequency and phase of the suppressed carrier of the digitized final I-F signal, the frequency and phase of the digitized final I-F signal as referred to its suppressed carrier are adjusted. This adjustment can be implemented in the analog regime, using automatic-frequency-and-phase-control (AFPC) of a local oscillator used in the analog downconversion o

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