Radio receiver DC offset cancellation via ADC input bias

Details Radio receiver DC offset cancellation via ADC input bias Radio receiver DC offset cancellation via ADC input bias

2004-12-17

2008-12-23

Phu, Sanh D (Department: 2618)

Telecommunications

Receiver or analog modulated signal frequency converter

Frequency modifying or conversion

C455S324000, C455S312000, C455S266000, C375S345000, C375S346000, C375S350000

Reexamination Certificate

active

07469137

ABSTRACT:
A scaled input current is produced that substantially matches the full scale input of a CTΔΣADC that substantially cancels an offset bias current component of the input current. A bias resistance value is coupled between the integrator input and one of a supply voltage and a circuit common. Generally, the system is operable to produce digital data based on the filtered IF signals based on an analog feedback signal and upon an offset compensation signal wherein the analog feedback signal is based upon the digital data. Offset compensation logic is operable to detect an amount of DC offset in a digital IF demodulated digital serial data and producing the offset compensation control signal based upon the detected amount of DC. A programmable bias current is operable to substantially cancel a bias voltage component of the received analog feedback signal based upon an offset compensation control signal.

REFERENCES:
patent: 6366622 (2002-04-01), Brown et al.
patent: 6700514 (2004-03-01), Soltanian et al.
patent: 6985711 (2006-01-01), Holenstein et al.
patent: 7038783 (2006-05-01), Standjord et al.
patent: 2005/0123072 (2005-06-01), Guimaraes
patent: 2005/0250459 (2005-11-01), Tervaluoto et al.

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