Radio receiver and method for preloading an average...

Pulse or digital communications – Receivers – Automatic baseline or threshold adjustment

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C375S285000, C375S350000, C455S296000

Reexamination Certificate

active

06757340

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention generally relates to the wireless telecommunications field and, in particular, to a radio receiver and method for preloading a channel filter with an average DC offset before filtering a signal within the channel filter.
2. Description of Related Art
A mobile phone incorporates many components which can include a radio receiver configured as a homodyne receiver or heterodyne receiver. Unfortunately, the above-mentioned radio receivers generate an undesirable DC offset that adversely affects or increases a transient settling time in time division multiple access (TDMA) based communication systems. Transient settling time or start-up time is the length of time required within a filter to reduce the undesirable DC offset to an acceptable level before being able to output a desired signal from the radio receiver. The traditional solution used to reduce the transient settling time within the filter is to compensate for the undesirable DC offset by adding complex DC offset compensation circuitry to an analog section of the radio receiver.
An example of the traditional radio receiver incorporating the complex analog DC offset compensation circuitry is briefly discussed below and disclosed in Baker et al. U.S. Pat. No. 5,724,653.
Referring to
FIG. 1
(PRIOR ART), there is illustrated a block diagram of the traditional radio receiver
100
incorporating complex analog DC offset compensation circuitry
102
described in the '653 patent. The general architecture of the radio receiver
100
(e.g., heterodyne receiver) is well known in the industry and as such is not described in great detail herein.
Basically, the traditional radio receiver
100
includes an antenna
104
for receiving an input radio signal from a transmitter
106
. The received input radio signal is amplified through a low noise amplifier
108
and coupled to a first mixer
110
, via a first switch
112
. The first mixer
110
connects to a first local oscillator
114
by way of a second switch
116
and outputs an intermediate frequency (IF) signal
117
related to the received input radio signal. The first switch
112
and the second switch
116
include some of the components associated with the DC offset compensation circuitry
102
.
The IF signal
117
is filtered by a bandpass filter
118
coupled to the first mixer
110
, and amplified by a variable gain amplifier
120
coupled in series with the bandpass filter. A capacitor
122
couples the variable gain amplifier
120
to a demodulation circuit configured to demodulate the IF signal
117
into a baseband inphase (I) signal
124
and a baseband quadrature (Q) signal
126
. More specifically, the demodulation circuit includes a second local oscillator
128
connected to a second mixer
130
, third mixer
132
and phase shifter
133
that collectively operate to convert the IF signal
117
into the baseband I signal
124
and the baseband Q signal
126
, reactively.
The demodulation circuit further includes a first DC correction circuit
134
and a second DC correction circuit
136
representing the remaining components of -the DC offset compensation circuitry
102
. The first and second DC correction circuits
134
and
136
each include a low pass filter
138
for reducing noise bandwidth and filtering erroneous samples associated with the baseband I signal
124
and the baseband Q signal
126
.
The DC offset compensation circuitry
102
is configured such that each of the first and second DC correction circuits
134
and
136
are adapted to store a DC offset prior to the received input radio signal being coupled into the first mixer
110
. In other words, the first and second switches
112
and
116
are opened to prevent the received input radio signal from entering the first mixer
110
when the DC offsets are being stored in the first and second DC correction circuits
134
and
136
.
Thereafter, each of the first and second DC correction circuits
134
and
136
operate to subtract the stored DC offset from the corresponding baseband I signal
124
and baseband Q signal
126
received upon closing the first and second switches
112
and
116
. The baseband I signal
124
and baseband Q signal
126
are then amplified by respective amplifiers
140
and converted to digital baseband signals by respective analog-to-digital (A/D) convertors
142
. The digital baseband signals are filtered by digital filters
144
and then digitally demodulated by a digital demodulator
146
to output a desired signal
148
. of course, the timing required to open and close the first and second switches
112
and
116
combined with the operations of storing and subtracting of the DC offsets by the first and second DC correction circuits
134
and
136
of the traditional radio receiver
100
is a complex way to compensate for DC offsets. Accordingly, there is a need for a radio receiver and method that effectively compensates for undesirable DC offsets in a less complex manner.
BRIEF DESCRIPTION OF THE INVENTION
The present invention is A method and radio receiver that effectively compensates for an undesirable DC offset in a digital section of the radio receiver by preloading a filter with an average DC offset before routing a signal through the filter. More specifically, the radio receiver includes an antenna for receiving a radio signal, and an analog section for demodulating the received radio signal into at least one baseband signal. The radio receiver also includes an analog-to-digital section for converting the at least one baseband signal into at least one digital baseband signal. The radio receiver further, includes a preloading system for calculating an average DC offset using a predetermined number of symbols from the at least one digital baseband signals and for preloading a filter with the calculated average DC offset prior to filtering the at least one digital baseband signal in the filter.
In accordance with the present invention, there is provided a method and radio receiver that reduces the current consumption of the radio receiver.
Also in accordance with the present invention, there is provided a method and radio receiver that reduces a transient settling time in a filter.
Further in accordance with the present invention, there is provided a method and radio receiver that effectively suppresses interference attributable to a filter in an adjacent timeslot.


REFERENCES:
patent: 4873702 (1989-10-01), Chiu
patent: 5142552 (1992-08-01), Tzeng et al.
patent: 5422889 (1995-06-01), Sevenhans et al.
patent: 5442655 (1995-08-01), Dedic et al.
patent: 5612975 (1997-03-01), Becker et al.
patent: 5663988 (1997-09-01), Neustadt
patent: 5724653 (1998-03-01), Baker et al.
patent: 5754595 (1998-05-01), Honkasalo et al.
patent: 0 840 484 (1998-05-01), None
patent: 10308684 (1998-11-01), None
Standard EPO Search Report dated Oct. 18, 1999.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Radio receiver and method for preloading an average... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Radio receiver and method for preloading an average..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Radio receiver and method for preloading an average... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3301178

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.