Radio receiver and despreader

Details Radio receiver and despreader Radio receiver and despreader

1999-07-13

2003-04-15

Vo, Nguyen T. (Department: 2682)

Multiplex communications

Communication over free space

Combining or distributing information via code word channels...

C455S562100, C342S373000, C375S148000

Reexamination Certificate

active

06549527

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a radio receiver for improving transmission performance based on a desired directivity or diversity system by applying prescribed processing to received signals having reached to a plurality of antennas concurrently, and a despreader to be mounted in the radio receiver and for applying despread processing to received signals which is adaptive to a CDMA system.
2. Description of the Related Art
A code division multiple access (CDMA) system, which essentially has confidentiality and interference-resistibility, is a multiple access system in which the suppression of cochannel interference and the efficient reuse of radio frequencies are possible.
In addition, such a CDMA system is positively being applied to mobile communication systems recently due to the fact that the establishment of technologies for realizing the transmitting power control with high accuracy and high response has enabled the flexible control of radio transmission characteristics by the sector zone.
FIG. 14
is a diagram showing an example of a configuration of a receiving system in a mobile communication system to which the CDMA system is applied.
In the diagram, the feeding ends of the four antennas
141
-
1
to
141
-
4
are individually connected to the four inputs of an A/D conversion package
142
. The four outputs of the A/D conversion package are connected to the corresponding inputs of a receiver package
144
via lines
143
-
1
to
143
-
4
, respectively.
The A/D conversion package
142
is composed of: a front end part
145
-
1
and an A/D converter (A/D)
146
-
1
cascade-connected between the feeding end of the antenna
141
-
1
and an end of the line
143
-
1
; a front end part
145
-
2
and an A/D converter (A/D)
146
-
2
cascade-connected between the feeding end of the antenna
141
-
2
and an end of the line
143
-
2
; a front end part
145
-
3
and an A/D converter (A/D)
146
-
3
cascade-connected between the feeding end of the antenna
141
-
3
and an end of the line
143
-
3
; and a front end part
145
-
4
and an A/D converter (A/D)
146
-
4
cascade-connected between the feeding end of the antenna
141
-
4
and an end of the line
143
-
4
.
The receiver package
144
is composed of receiving parts
147
-
1
to
147
-
4
and a searcher
148
. Each of the receiving parts
147
-
1
to
147
-
4
is connected to all of the other ends of the lines
143
-
1
to
143
-
4
, and supplied with control signals, which designates the type of the despreading code to be applied, from the outside (from an unshown channel controlling equipment, for example). The searcher
148
is arranged between the other end of the line
143
-
4
and the controlled inputs of the receiving parts
147
-
1
to
147
-
4
.
The receiving part
147
-
1
is composed of: multipliers
149
-
11
to
149
-
14
, whose inputs are individually connected to the other ends of the lines
143
-
1
to
143
-
4
; a despreading code generating part (CODE)
150
-
1
, whose input is supplied with the said control signals, whose other input is connected to the corresponding output of the searcher
148
, and whose output is connected at the output to the other inputs of the multipliers
149
-
11
to
149
-
14
; and dump filters (DUMP)
151
-
11
to
151
-
14
, whose filters are arranged individually at the subsequent stages of the multipliers
149
-
11
to
149
-
14
, and output demodulation signals.
In connection to this, since the receiving parts
147
-
2
to
147
-
4
are the same as the receiving part
147
-
1
in configuration, the corresponding components are hereinafter designated by like numerals with the first index numbers of “2” to “4”, and explanations and drawings thereof are omitted here.
The searcher
148
is composed of: a cascade-connected matched filter
152
, smoothing part
153
, and a RAM
154
; and a path sensing part
155
arranged at the subsequent stage of the RAM
154
and connected to the corresponding inputs of the despreading code generating parts
150
-
1
to
150
-
4
which are individually equipped in the receiving parts
147
-
1
to
147
-
4
.
The matched filter
152
is composed of: a shift register
156
, where it is operated in synchronization with the above-mentioned despreading code and with a clock, which is is 8fc in frequency with respect to the chip rate fc of the despreading code, and has stages of (8L−1) in number with respect to the word length L of the despreading code; a multiplier
157
, where it individually connected to each of the inputs and outputs of all the stages of the shift register
156
, and weights (either “1” or “−1”) representing the logical values of the corresponding bits are previously individually set among the bits composing a despreading code; and an adder
158
, where it is arranged at the subsequent stage of the multiplier
157
as the final stage.It is assumed that the number of stages of the shift register
156
is “31,” for simplicity in th following.
In the conventional example of such configuration, the front end parts
145
-
1
to
145
-
4
respectively convert the received signals having reached concurrently to the antenna
141
-
1
to
141
-
4
into equivalent signals in the baseband domain (hereinafter, referred to as “spreading signals”).
The respective A/D converters
146
-
1
to
146
-
4
simultaneously over-sample the spread signals at a period of (⅛fc) (hereinafter, referred to as “over-sampling period”) with respect to the chip rate fc to generate discrete signals, and send the discrete signals to the lines
143
-
1
to
143
-
4
.
In the searcher
148
equipped in the receiver package
144
, the shift register
156
sequentially stores the discrete signals supplied through the line
143
-
4
, and the multiplier
157
and the adder
158
correlate between the stored discrete signals and the despreading code given in advance as the said weights.
The smoothing part
153
obtains a delay profile as shown in
FIG. 15.
, and stores it in the RAM
154
by averaging the results of the correlation over a period of plural times or more than the period of the despreading code, by every period of the despreading code, and in the order of time series.
The path sensing part
155
reads out the delay profile stored in the RAM
154
as described above, in the order of time series at the periods of the despreading code. By this means, the path sensing part
155
outputs a “path detection signal,” which is composed of pulse sequences showing the time point in which the averaged value exceeding a predetermined threshold value is detected, re-cyclically at the period of the despreading code.
Among the receiving parts
147
-
1
to
147
-
4
, in the receiving part
147
-
1
, for example, the despreading code generating part
150
-
1
begins to generate a despreading code at the time point in which a channel allocated based on a prescribed procedure of channel control is shown and the control corresponding signals are given from the outside are supplied concurrently among the pulsed train supplied as the above-mentioned path detection signals.
The multipliers
149
-
11
to
149
-
14
apply despread processing to the discrete signals by multiplying the despreading code and the discrete signals supplied through the lines
143
-
1
to
143
-
4
.
As a result, among the components contained in the received signals having reached to the antennas
141
-
1
to
141
-
4
, four demodulation signals showing components in the channel allocated under channel control are obtained respectively in the baseband domains at the outputs of the multipliers
149
-
11
to
149
-
14
.
In connection to this, these modulation signals are perfomed prescribed filter processing in the dump filters
151
-
11
to
151
-
14
respectively, and synthetic processing for extracting only the components arriving at the antennas
141
-
1
to
141
-
4
based on adaptive algorithms.
However, such synthetic processing is not the feature of the present invention; therefore, the systems containing the adaptive algorithms to be a

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