Telecommunications – Receiver or analog modulated signal frequency converter – Local control of receiver operation
Reexamination Certificate
1999-03-29
2001-09-11
Bost, Dwayne (Department: 2681)
Telecommunications
Receiver or analog modulated signal frequency converter
Local control of receiver operation
C455S264000, C375S376000
Reexamination Certificate
active
06289208
ABSTRACT:
BACKGROUND OF THE INVENITON
1. Field of the Invention
The present invention relates to a receiver preferably adapted to a radio receiver or the like realized with, for example, a frequency synthesizer utilizing a phase locked loop circuit (hereinafter a PLL circuit).
2. Description of the Related Art
Conventionally, for example, a circuit shown in
FIG. 1
has been developed as a receiver utilizing a frequency synthesizer based on a PLL circuit. The configuration thereof will be described below. The circuit includes a PLL circuit comprising a voltage-controlled oscillator
51
(hereinafter a VCO), a variable frequency divider
52
, a reference oscillator
53
, a phase detector
54
, and a low-pass filter
55
(hereinafter an LPF). The VCO
51
controls the oscillation frequency of a resonant element (hereinafter a local-oscillation frequency) according to a dc value control voltage. The variable frequency divider
52
outputs a signal which is obtained by frequency-dividing the local-oscillation frequency according to an externally supplied digital value (binary value). The reference oscillator
53
produces a signal of a reference frequency. The phase detector
54
compares in phase an input signal sent from the variable frequency divider
52
with an input signal sent from the reference oscillator
53
. If there is an error between the input signals, the phase
53
detector outputs an error voltage corresponding to the error. The LPF smoothes the error voltage sent from the phase detector
54
and supplies an output as a control voltage to the VCO
51
. A switch
56
having a movable contact
56
a
and first and second stationary contacts
56
b
and
56
c
is interposed between the LPF
55
and VCO
51
. The output side of the LPF
55
is connected to the first stationary contact
56
b
of the switch
56
, and the input side of the VCO
51
is connected to the movable contact
56
a
thereof.
Moreover, this circuit includes a microcomputer
57
for outputting a digital value that specifies a dividing ratio for the variable frequency divider
52
. The dc value control voltage supplied from the LPF
55
to the VCO
51
is converted into digital data by an analog-to-digital converter
58
. The digital data is then fetched into and held in the microcomputer
57
. Moreover, the microcomputer
57
is connected to a digital-to-analog converter
59
. The digital-to-analog converter
59
converts the digital data output from the microcomputer
57
into a dc value control voltage. The output side of the digital-to-analog converter
59
is connected to the second stationary contact
56
c
of the switch
56
.
An oscillation signal (local-oscillation signal) output from the VCO
51
is supplied to a reception unit
60
. For example, a signal received by an antenna
61
is tuned to a frequency corresponding to the local-oscillation frequency. The tuned received signal is output through a terminal
62
.
The operation of the circuit shown in
FIG. 1
will be described below. To begin with, a description will be made of an operation performed when the local-oscillation frequency in the PLL circuit is fixed to a desired value. The movable contact
56
a
of the switch
56
is connected to the first stationary contact
56
b
, whereby the PLL circuit becomes a closed circuit. The microcomputer
57
sets a numerical value specifying a frequency dividing ratio so that the local-oscillation frequency will assume the desired value. Data of the numerical value is then output to the variable frequency divider
52
. The variable frequency divider
52
frequency-divides the local-oscillation frequency dependent on the specified frequency dividing ratio and outputs the resulant signal to the phase detector
54
. The phase detector
54
compares in phase the signal whose frequency is the fraction of the local-oscillation frequency with a reference-frequency signal output from the reference oscillator
53
. If there is an error between the signals, an error voltage corresponding to the phase error is output to the LPF
55
. The LPF
55
converts the input error voltage into a dc voltage. The dc voltage is supplied as a control voltage to a resonant element included in the VCO
51
. The resonant element of the VCO
51
oscillates at a frequency controlled with the control voltage supplied from the LPF
55
. An output is then supplied to the variable frequency divider
52
at the local-oscillation frequency. The foregoing operation of the PLL is repeated by the closed circuit until the phase error is not found by the phase detector
54
. When the signal whose frequency is the fraction of the local-oscillation frequency and the reference-frequency signal output from the reference oscillator
53
becomes in phase with each other, the local-oscillation frequency is stabilized at the desired value. The reception unit
60
then receives, for example, a radio broadcast transmitted at a frequency corresponding to the stabilized local-oscillation frequency.
In the circuit shown in
FIG. 1
, when the operation of the PLL is stabilized, the PLL circuit is halted and the turning process is carried out. That is, when the local-oscillation frequency is stabilized, the control voltage signal output from the LPF
55
to the resonant element included in the VCO
51
is converted into digital data by the analog-to-digital converter
58
. The digital data is then fetched into and held in the microcomputer
57
.
When the operation of the PLL is stabilized, the movable contact
56
a
of the switch
56
is switched over to the second stationary contact
56
c
. Digital data concerning a control voltage to be supplied to the VCO
51
and held in the microcomputer
57
is output to the digital-to-analog converter
59
. The digital-to-analog converter
59
converts the digital data to produce a control voltage. The control voltage is supplied to the VCO
51
via the switch
56
. The oscillation frequency of the VCO
51
is controlled with the supplied control voltage and then fixed. A signal whose frequency corresponds to the oscillation frequency is received by the reception unit
60
. When the movable terminal
56
a
of the switch
56
is connected to the stationary terminal
56
c
, the closed circuit of the PLL will not be realized any longer. Only part of the components including the VCO
51
and microcomputer
57
is operated, and the other equipment is halted.
Owing to the foregoing configuration, the PLL portion should be operated only when a reception frequency has been changed. After the local-oscillation frequency is fixed, the PLL portion requiring a large power consumption is halted and the tuning is carried out. The power consumption required by the receiver realized with a frequency synthesizer can thus be reduced.
In the foregoing circuit, after the PLL operation of portion is halted with digital data of a control voltage held, the read digital data of the control voltage is output unilaterally from the microcomputer, and converted into a dc voltage by the digital-to-analog converter. The VCO is thus controlled. The dc voltage to be supplied from the digital-to-analog converter may shift depending on the performances of parts and environmental capabilities concerning temperature and the like. Otherwise, the frequency at which the resonant element of the VCO is resonant may shift depending thereon. This poses a problem in that the receiving performance of the receiver deteriorates. In particular, when a received carrier wave is a shortwave, the shift emerges outstandingly and the receiving performance deteriorates markedly.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a receiver requiring a small power consumption and maintaining excellent receiving performance.
According to the present invention, there is provided a frequency synthesizer type receiver having a reception frequency thereof set based on an oscillatory output of a PLL circuit, in which a control voltage to be supplied to a voltage-controlled oscillator included in the PLL circuit is supplied from control means different fro
Bost Dwayne
Gelin Jean A
Maioli Jay H.
Sony Corporation
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