Radio frequency CMOS buffer circuit and method

Details Radio frequency CMOS buffer circuit and method Radio frequency CMOS buffer circuit and method

2006-06-20

2006-06-20

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S108000, C327S391000

Reexamination Certificate

active

07064598

ABSTRACT:
A buffer (40) includes a capacitor (42) having a first terminal for receiving an input signal, and a second terminal; a first transistor (44) having a first current electrode for receiving a first power supply voltage, a control electrode coupled to the second terminal of the capacitor (42), and a second current electrode for providing an output signal of the buffer (40); and a second transistor (45) having a first current electrode coupled to the second current electrode of the first transistor (44), a control electrode coupled to the second terminal of the capacitor (42), and a second current electrode for receiving a second power supply voltage. A capacitance of the capacitor (42) is chosen to reduce a peak-to-peak voltage swing of the input signal such that a peak-to-peak voltage swing at the control electrodes of the first (44) and second (45) transistors is less than or equal to a difference between the first and second power supply voltages.

REFERENCES:
patent: 4906871 (1990-03-01), Iida
patent: 5491441 (1996-02-01), Goetschel et al.
patent: 6864736 (2005-03-01), Guedon et al.
Weste et al., Principles of CMOS VLSI Design: A Systems Perspective, 2ndEdition,Addison Wesley, 1993, p. 207-213.

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