Radio frequency CMOS amplifier with enhanced linearity and...

Details Radio frequency CMOS amplifier with enhanced linearity and... Radio frequency CMOS amplifier with enhanced linearity and...

2007-04-17

2007-04-17

Choe, Henry (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

C330S295000

Reexamination Certificate

active

10918745

ABSTRACT:
In general, the disclosure is directed to techniques for enhancing power efficiency and linearity in an RF power amplifier. In accordance with the invention, a combination of different class power amplifiers is implemented in a parallel configuration to overcome the trade-off that exists between power efficiency and linearity. In particular, a class A amplifier and a class B amplifier are arranged in parallel to produce a combined amplifier output for an input signal. With bias voltages set to achieve a desired operating ratio between the class A and class B amplifier, the combined amplifier can provide a high power gain over a larger input range. In addition, the class B amplifier can provide increased power efficiency for larger inputs.

REFERENCES:
patent: 6329877 (2001-12-01), Bowen et al.
patent: 7046746 (2006-05-01), Keaney et al.
patent: 022228807 (1990-09-01), None

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