Radio communication device using quadrature...

Pulse or digital communications – Systems using alternating or pulsating current – Angle modulation

Reexamination Certificate

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Details

C455S083000

Reexamination Certificate

active

06185260

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a radio communication device using quadrature modulation demodulation circuit for implementing correction of DC offset error fluctuation caused by power source voltage fluctuation of the circuit or circumferential temperature variation.
DESCRIPTION OF THE RELATED ART
Formerly, a radio communication device using a quadrature modulation-demodulation circuit is generally in use for digital communication. The current cellular system proceeds to the digital communication system such as the IS-136 system using &pgr;/4·DQPSK signal in North America or the GSM system using GMSK signal in Europe and so forth from the analog communication system using FM signal. In these digital communication systems, a synchronous detection circuit for reception and a quadrature modulation circuit for transmission are in use universally.
FIG. 1
shows a configuration of transmitter-receiver circuit of general digital cellular system according to conventional example 1. A signal outputted from a base station is inputted to an antenna
1
through a radio line, thus being received at a channel-select circuit
2
in response to an output frequency of a local oscillation circuit
12
, then the signal is amplified to be outputted. The signal outputted from the channel-select circuit
2
is inputted to a quadrature demodulation circuit
3
, thus being subjected to synchronous detection to output both of an in-phase base band signal Sir and a quadrature base band signal Sqr.
Each of the in-phase base band signal Sir and the quadrature base band signal Sqr is inputted to a DC offset adjusting circuit
4
, thus causing a DC offset value thereof to be adjusted in response to a reception DC offset adjusting signal Sar set beforehand in the DC offset adjusting circuit
4
, before being outputted. The output signal of the DC offset adjusting circuit
4
is inputted to an A/D conversion circuit
5
, thus being quantized to be outputted.
The in-phase base band signal Sir and the quadrature base band signal Sqr which are quantized in the A/D conversion circuit
5
are subjected to data demodulation in a digital signal processing section
6
respectively, thus also being subjected to processing of error correction and so forth to be outputted. On the other hand, transmission data outputted from the digital signal processing circuit
6
is converted into an in-phase base band signal Sit and a quadrature base band signal Sqt in a base band signal generation circuit
8
to be outputted. The in-phase base band signal Sit and the quadrature base band signal Sqt are inputted to a DC offset adjusting circuit
9
, thus causing a DC offset error to be adjusted based on a transmission DC offset adjusting signal Sat which is set beforehand, before being inputted respectively to a quadrature demodulation circuit
10
.
The quadrature demodulation circuit
10
inputs thereto an output of a local oscillation circuit
13
, above described in-phase base band signal Sit, and the above described quadrature base band signal Sqt, thus outputting a signal of radio frequency band which is demodulated. The output of the quadrature demodulation circuit
10
is subjected to power amplification by a power amplifier
11
, before being transmitted through the antenna
1
. The reception DC offset adjusting signal Sar and the transmission DC offset adjusting signal Sat whose values adjusted in adjusting process at the time of production are stored in memory, are outputted through a CPU
7
.
Consequently, when realizing a radio communication device using quadrature modulation-demodulation circuit, the DC offset error involved in the in-phase base band signal Sit and the quadrature base band signal Sqt outputted from the base band signal generation circuit is adjusted to be set in every device in the production process.
The Japanese Patent Application Laid-Open No. HEI 08-32462 by way of the conventional example 2 discloses “DC OFFSET CIRCUIT OF CARTESIAN LOOP”. In the conventional example 2, it causes DC offset of an operational amplifier for demodulation to be implemented in every time transmission starting, so that drift caused by temperature variation or power fluctuation or the like is absorbed to obtain appropriate balance of demodulation-modulation circuit, and fluctuation caused by difference of transmitter is absorbed to obtain appropriate balance of demodulation-modulation circuit at all times.
However, the radio communication device using quadrature modulation demodulation circuit shown in the above-described conventional example involves problem that it is incapable of implementing accurately correction of erroneous fluctuation of DC offset caused by power voltage fluctuation of the circuit or circumferential temperature variation. On the other hand, in the above described digital cellular system, there becomes problem that how to remove unnecessary sprious generated by these DC offset error.
SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of the present invention to provide a radio communication device using a quadrature modulation-demodulation circuit which enables erroneous fluctuation of DC offset to be corrected more accurately.
In one arrangement to be described below by way of example in illustration of the invention, a radio communication device using a quadrature modulation-demodulation circuit, includes a quadrature demodulation circuit for inputting a QPSK signal to output a base band signal perpendicularly intersecting with the QPSK signal inputted thereto, a base band signal generation circuit which inputs a transmission data to convert into two analog base band signals perpendicularly intersecting each other, before outputting them a quadrature modulation circuit which inputs both of the analog base band signal and a modulated frequency signal, thus outputting the QPSK signal, a switching circuit inputting thereto both of the analog base band signal and the QPSK signal, thus selecting either one of two signals to be outputted, an A/D conversion circuit inputting thereto an output signal of the switching circuit, thus quantizing the output signal to be outputted, offset error detecting means inputting thereto an output signal of the A/D conversion circuit to detect a DC offset error, and a DC offset error adjusting circuit for correcting DC offset error involved in the analog base band signal and the QPSK signal, wherein when the analog base band signal is selected in the switching circuit, the radio communication device using modulation-demodulation circuit causes the DC offset error to be corrected.
In one particular arrangement to be described in illustration of the present invention, by way of example, the radio communication device using the quadrature modulation-demodulation circuit, wherein the offset error detecting means integrates signal outputted from the A/D conversion circuit during prescribed time period to detect the DC offset error.
In another particular arrangement to be described in illustration of the present invention, by way of example, the radio communication device using the quadrature modulation-demodulation circuit, wherein the offset error detecting means, when the analog base band signal is selected in the switching circuit, causes a data pattern in which the analog base band signal swings in between plus side and minus side with equi-ratio to be used by way of transmission data.
The above and further objects and novel features of the invention will be more fully understood from the following detailed description when the same is read in connection with the accompanying drawings. It should be expressly understood, however, that the drawings are for purpose of illustration only and are not intended as a definition of the limits of the invention.


REFERENCES:
patent: 5613226 (1997-03-01), Kanami
patent: 5628059 (1997-05-01), Kurisu
patent: 5642378 (1997-06-01), Denheyer et al.
patent: 5712870 (1998-01-01), Petrick
patent: 5818827 (1998-10-01), Usui et al.
patent: 5896419 (1999-04-01), Suzuki
patent: 5982807 (1999-11-01), S

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