Radiation shield and radiation shielded integrated circuit...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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C257S685000, C257S678000

Reexamination Certificate

active

06452263

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to radiation shielding for an integrated circuit die.
BACKGROUND OF THE INVENTION
Electrons trapped in high earth orbits and electrons and protons trapped in low and medium earth orbits cause a high level of ionizing radiation in space. Such ionizing radiation causes an accumulation of charge in electronic circuits which eventually results in a malfunction or failure of the circuits.
Shielding is commonly provided to protect radiation sensitive components. Currently, flat slabs of high-Z metal or layers of high-Z and low-Z metals are attached to either the top or top and bottom of electronics packages for shielding. The high Z metals, such as tungsten/copper alloys, absorb ionizing radiation, such as protons and electrons, and reemit the energy from such radiation in the more innocuous forms of light, some heat, and secondary electrons. Secondary electrons have a very short range and are mostly absorbed by high-Z metals, as well. The low Z materials, such as aluminum, also absorb secondary electrons, and can improve the efficiency of the shield. However, such configurations do not sufficiently protect sensitive electronics from radiation entering from the sides of the device, where no shielding material is present.
Shielding material is also used to encapsulate the integrated circuit die. Connections are provided within the shield from the integrated circuit die to package leads extending through insulated feedthroughs through the shielding material, for electronic interconnection. The shield encapsulating the integrated circuit die must be hermetically sealed. See, example, U.S. Pat. No. 5,635,754. While usually providing better radiation protection, such devices are complex and expensive to manufacture. The additional shielding material also provides additional weight, which is a concern for electronics to be used in space. Launch costs for a satellite are about $10,000 per pound.
Another method for protecting sensitive electronics is to design a radiation tolerant integrated circuit die that can withstand high levels of ionizing radiation. These design methodologies can involve redundancy of electronic circuits, suitable doping of the semiconductor material, and spacing of electronic circuits. These methodologies are not normally used in commercially available electronics and require increased cost for redesign and production.
SUMMARY OF THE INVENTION
One embodiment of the present invention is a radiation shield comprising high Z material and having a central section with a first thickness and an outer section with a second thickness. The second thickness is less than the first thickness. The central section may support or be aligned with an integrated circuit die. The central, thicker portion is dimensioned to absorb ionizing radiation directed perpendicular to the external surface of the shield. The outer portion is dimensioned to dissipate ionizing radiation impinging on outer portions of the external surface of the radiation shield at an angle which may enable the radiation to impact an integrated circuit die or other such target. Since this ionizing radiation travels through the shielding material at an angle, it travels a greater distance through the shielding material than radiation directly on the external surface of the shield. The ionizing radiation can therefore be sufficiently absorbed, despite the lesser thickness.
In accordance with another embodiment of the invention, a radiation shielded integrated circuit device comprises an integrated circuit die and a first layer of shielding material supporting the integrated circuit die. The first layer has a central portion having a first thickness having an area at least as large as the area of the IC die, and an outer portion having a second thickness less than the first thickness. A wall of ceramic material has a first edge connected to the outer portion of the first layer of shielding material. The wall of ceramic material has an inner surface defining, in conjunction with the first layer of shielding material, a well containing the integrated circuit die. A plurality of wire bond pads are supported by the inner surface of the ceramic wall. A plurality of input/output pads are connected to an exterior surface of the ceramic walls. Conducting material extending through the ceramic material connects each of the wire bond pads to a respective one of input/output pads. Wire bands connect the integrated circuit die to the wire band pads. A second layer of shielding material is connected to a second edge of the ceramic wall.


REFERENCES:
patent: 5406117 (1995-04-01), Dlugokecki et al.
patent: 5635754 (1997-06-01), Strobel et al.
patent: 5825042 (1998-10-01), Strobel et al.
patent: 5880403 (1999-03-01), Czajkowski et al.
patent: 5889316 (1999-03-01), Strobel et al.
patent: 5998867 (1999-12-01), Jensen et al.
patent: 6261508 (2001-07-01), Featherby et al.
patent: 6262362 (2001-07-01), Czajkowski et al.
patent: 6319740 (2001-11-01), Heffner et al.

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