Radiation hardening method for shallow trench isolation in CMOS

Details Radiation hardening method for shallow trench isolation in CMOS Radiation hardening method for shallow trench isolation in CMOS

2005-05-10

2005-05-10

Keith, Jack (Department: 2822)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S400000, C438S424000, C438S426000, C438S429000, C438S439000, C438S443000, C438S911000

Reexamination Certificate

active

06890832

ABSTRACT:
A radiation-hardened STI process includes implanting a partially formed wafer with a fairly large dose (1013to 1017ions/cm2) of a large atom group III element, such as B, Al, Ga or In at an energy between about 30 and 500 keV. The implant is followed by an implant of a large group V element, such as P, As, Sb, or Bi using similar doses and energies to the group III element. The group V element compensates the group III element. The combination of the two large atoms decreases the diffusivity of small atoms, such as B, in the implanted areas. Furthermore, the combination of the group III and group V elements in roughly equal proportions creates recombination sites and electron traps in the field oxide, resulting in a radiation hardened semiconductor device.

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