Radiation hardened drain-source protected MNOS transistor

Details Radiation hardened drain-source protected MNOS transistor Radiation hardened drain-source protected MNOS transistor

1977-02-04

1979-04-03

Wojciechowicz, Edward J.

357 52, 357 54, H01L 2978

Patent

active

041480490

ABSTRACT:
A radiation hardened drain-source protected MNOS transistor is disclosed. A layer of silicon oxide overlies the channel and the junctions formed by the intersections of the drain and source regions with the channel. Drain and source protection is provided by relatively thick portions of the silicon oxide layer which overlie the junctions formed by the drain and source regions and the channel. The portion of the silicon oxide layer overlying the central section of the channel is thinner than the remainder of this layer.
A silicon nitride layer and an electrically conductive layer forming the gate electrode overlie the thinner portion of the silicon oxide layer to complete the MNOS transistor. The conductive layer forming gate electrode of the transistor is in electrical contact with both the silicon nitride and the silicon oxide layers. This provides a convenient method for electrons generated at the interface of the silicon and the silicon-oxide layer during irradiation to be transported to the gate, thereby preventing charge build-up in the silicon oxide which causes shifts in the characteristics of the transistor.

REFERENCES:
patent: 3836894 (1974-09-01), Cricchi

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