Radiation hardened dielectric for EEPROM

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

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257410, 257650, H01L 29792

Patent

active

058083537

ABSTRACT:
A EEPROM 140 has a storage transistor 160 with a gate insulating layer 104 of BPSG and a polysilicon gate 112.2 of the same layer as the polysilicon gate 112.1 of the FET transistor 150. The BPSG layer 104 has POHC traps that capture holes injected into N well 103.2. A positive voltage applied to N well 103.2 programs the storage transistor 160 off. Applying a positive voltage to the gate 112.2 neutralizes the holes stored in layer 104 and erases the memory of transistor 160.

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patent: 5241208 (1993-08-01), Taguchi
patent: 5329486 (1994-07-01), Lage
R. S. Muller and T. I. Kamins, Device Electronics For Integrated Circuits, John Wiley & Sons, Inc., pp. 372-376, 1977. no month.

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