Fishing – trapping – and vermin destroying
Patent
1988-06-21
1990-02-20
James, Andrew J.
Fishing, trapping, and vermin destroying
357 55, 357 42, 357 50, 437 62, 437 63, 437 70, H01L 2176
Patent
active
049031082
ABSTRACT:
Integrated circuits with vertical isolated trenches are radiation hardened by providing vertical gate segments, preferably, of doped polycrystalline silicon, in the trenches and connected at the bottom of the trenches to a region of the same conductivity type. The surface devices may be complementary and the vertical gates may also be complementarily doped. A method of fabrication is described for a single crystal wafer, as well as SOI.
REFERENCES:
patent: 4786960 (1988-11-01), Jeuch
"Characterization of the Lateral and Vertical Parasitic Transistors in a Trench Isolated CMOS Process", M. C. Roberts et al., pp. 411-412.
"Mosfet Achieved by a Combination of Polysilicon Sidewall and Simox Technology", T. Ohno et al., Electronic Letters, pp. 559-560, May 1986.
Rivoli Anthony L.
Wiles, Jr. William W.
Young William R.
Harris Corporation
James Andrew J.
Soltz David
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