Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – With reflector – opaque mask – or optical element integral...
Reexamination Certificate
2001-02-12
2004-05-04
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
With reflector, opaque mask, or optical element integral...
C257S099000, C257S094000, C257S081000, C257S077000, C257S103000, C257S623000
Reexamination Certificate
active
06730939
ABSTRACT:
TECHNICAL FIELD
Radiation-emitting semiconductor device, method for fabricating same and radiation-emitting optical device
The invention concerns a radiation-emitting semiconductor device in which a multilayer structure comprising a radiation-generating active region has assigned to it a window layer for coupling out radiation.
BACKGROUND
It relates in particular to a radiation-emitting semiconductor device comprising a nitride-based active multilayer structure arranged on an SiC-based epitaxial growth substrate and to a radiation-emitting optical device equipped with such a radiation-emitting semiconductor device.
The invention is further directed to a method for fabricating the radiation-emitting semiconductor device and to an optical device comprising a semiconductor body of this kind.
Typically, present-day radiation-emitting optical devices, especially light-emitting-diode devices, are equipped substantially exclusively with right-parallelepipedal radiation-emitting semiconductor devices, usually embedded in transparent casting material. A major difficulty with such devices is the large difference between the refractive indices of the semiconductor materials normally used in optical semiconductor devices (n>2.5) and those of the conventionally available casting materials (epoxy resin, for example; nepoxy>>1.5). Thus, the critical angle of total reflection at the boundary between the semiconductor body and the casting material is very small. It is for this reason that a substantial portion of the light generated in the active region fails to be coupled out of the semiconductor body, due to total reflection on the chip surfaces, and goes to waste inside it. Given a defined electrical current flowing through the semiconductor device to generate the light, the brightness of the device is therefore limited.
In the case of GaN-based light-emitting diode chips, where the epitaxial layer sequence is arranged on a substrate (for example, a silicon carbide substrate) that has a higher refractive index than the epitaxial layer sequence, the special problem also arises that with the conventional right-parallelepipedal chip geometry, the portion of the radiation coupled out by the lateral sides of the substrate is output in the direction of the back of the chip at a very acute angle with the lateral side of the substrate. This radiation is therefore incident on a housing mounting surface to which the chip is attached, striking it at a very steep angle and very close to the chip. This entails the disadvantages that, first, because of the acute angle of incidence, a large portion of the radiation is absorbed in the chip mounting surface, and second, there is considerable risk that some of the radiation will strike and be absorbed by the conductive adhesive normally used to secure the chip.
DE 198 07 758 A1 proposes a radiation-emitting semiconductor body which, to increase the light yield of the active region in the intended direction of radiation of the semiconductor body, comprises a subsequently added so-called primary window layer whose continuous lateral face forms an obtuse angle with the plane of extension of the multilayered heterostructure. The continuous lateral face forms an obtuse angle of between 110° and 140° with the plane of the active region. The primary window layer is formed by the epitaxial growth substrate or by an epitaxial layer grown separately thereon.
In addition, the semiconductor body in accordance with DE 198 07 758 A1 can comprise a further, so-called secondary window layer that is arranged by epitaxy or wafer bonding on the side of the active region facing away from the primary window layer, i.e., on the underside of the semiconductor body, and whose continuous lateral face forms an angle of between 40° and 70° with the plane of the active region. The semiconductor body therefore has obliquely disposed chip sides that are continuous from the top side to the underside.
This chip geometry serves primarily to make the face of the chip extending parallel to the active region larger than the active region and to cause all of the light striking the oblique side walls of the primary window to be reflected internally in the intended direction of radiation.
In addition, the secondary window layer performs the task of coupling out of the semiconductor body, via the oblique lateral faces of the secondary window layer, light that is emitted by the active region toward the back, i.e., in the direction of the mounting surface of the semiconductor body.
To reduce the outputting of light in the backward direction and to deflect this light to the front side, preferably within the very semiconductor body, a reflective coating is provided on all of the oblique sides of the chip.
This known chip geometry, which is intended primarily to improve the coupling-out of light via the front side, raises the following problems in particular:
(i) In the fabrication of the oblique lateral faces, a substantial portion of the area of the active epitaxial layer sequence present on the wafer is wasted, since the oblique lateral faces are produced by making a V-shaped trough from the active-region side.
(ii) The thickness of the secondary window layer is severely limited in order to preserve a sufficiently large chip mounting surface, thereby ensuring that
no tilting of the chip occurs as it being mounted in a light-emitting-diode housing,
there is current spreading to the entire active region, insofar as possible,
there is adequate heat dissipation from the active region,
the chip has sufficient mechanical stability. Thus, its width is preferably only about 10 to 40% of the lateral width of the active region.
(iii) The oblique sides meet the chip mounting surface of a light-emitting-diode housing to form a wedge-shaped gap, which in the case of conventional plastic LED housings is usually filled with transparent casting material. When the temperature of the device increases during operation and/or due to an increase in ambient temperature, as occurs, for example, in motor-vehicle applications, because of the high thermal expansion of ordinary casting compounds the chip is subjected to considerable mechanical stresses, due to which the risk of delamination of the chip from the chip mounting surface of the housing is substantially increased over that of right parallelepipedal chips.
(iv) The fabrication of the secondary window layer is technically very onerous, since this layer must be added by epitaxial growth or wafer bonding.
(v) The underside of the chip, which is the mounting surface, is the smallest surface of the semiconductor body, over which the widely projecting upper window region is disposed. There is accordingly a high risk that with an automatic chip mounting technique conventionally employed in chip mounting, usually a pick-and-place method, tilting of the chip and hence tilting of the beam axis of the light-emitting-diode device may occur. This risk is reduced if only one primary window layer and no secondary window layer is present.
(vi) The thickness of the lower window layer, if any, must be kept as small as possible for the reasons stated above under (ii) and (v). However, this means that a substantial portion of this window will be covered with an adhesive normally used to mount LED chips and thus will not be able to contribute fully—if at all—to the coupling-out of the light.
Points (ii) and (v) take on greater significance as the chip edge length decreases, i.e., as the cross section of the active region becomes smaller, an effect that is constantly being striven for in order to obtain the greatest possible chip yield from a single wafer, because the smaller the edge length the smaller the resulting chip mounting surface, in view of the proposed chip geometry. For these reasons, the bottom window layer is made as thin as possible or is omitted.
In terms of practical feasibility, the chip geometry known from DE 198 07 758 A1 is suited, if at all, only to GaP-based material systems, involving the epitaxial growth of thick layers of both types of semiconductors t
Eisert Dominik
Haerle Volker
Kuehn Frank
Mundbrod-Vangerow Manfred
Strauss Uwe
Fish & Richardson P.C.
Flynn Nathan J.
Forde Remmon R.
Osram Opto Semiconductors GmbH
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