Quick turn-on disable/enable bias control circuit for high...

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Accelerating switching

Reexamination Certificate

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Details

C327S376000, C327S377000, C323S901000

Reexamination Certificate

active

06400207

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to start-up circuits for integrated circuit applications. More particularly, the present invention relates to a quick turn-on disable/enable bias control circuit for use in conjunction with high speed CMOS amplifiers, particularly CMOS amplifiers used in high speed video multiplexing applications.
In certain types of electrical circuits, and particularly in high speed amplifier circuits, there are internal nodes that need to be quickly charged to a predetermined voltage level. To minimize power consumption, portions of the circuitry are designed to be disabled so as to be in a quiescent, low-power state until fully functional circuit operation is needed.
In conventional application of the power supply voltage to prior amplifier circuits, a slow ramp voltage is applied to the amplifier circuit and its associated bias circuitry. The slow ramp voltage often is too slow to provide adequately rapid operation of the internal bias circuitry of the amplifier. To speed the recovery of the amplifier from an off, i.e., disabled, condition, quick turn-on bias circuits have been provided, for example as disclosed in U.S. Pat. No. 5,742,155 to Susack et al. (April, 1998) and U.S. Pat. No. 6,057,721 to Nolan et al. (May, 2000). The bias voltage provided by the by Susack et al. and circuit includes an overdrive capability that initially drives the output voltage of a high gain amplifier to a much higher level than is required in order to accelerate a bias voltage node charging process, and a feedback loop operates to gradually return the bias voltage to the level needed by the circuit. The Nolan et al. patent discloses a high gain reference circuit and a current generator coupled together to initialize the high gain reference circuit to an active state. A high current is injected during start-up so as to rapidly charge certain nodes in the circuit, and the feedback loop gradually returns the current to a proper level. The large applied voltages, the high start-up currents, the relatively slow start-up times, the high amounts of power dissipation, and the long settling times of the quick turn on bias circuits disclosed in the above references make them unsuitable for use in some applications, for example in high speed CMOS operational amplifiers used in video multiplexing applications.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a bias control circuit that is capable of being disabled to a shutdown condition and being rapidly enabled from the shutdown condition to immediately provide a needed control bias voltage.
It is another object of the invention to provide a bias control circuit that is capable of being rapidly disabled to a shutdown condition and being rapidly enabled from the shutdown condition to immediately produce a control bias voltage applied to bias circuitry to produce a bias current.
It is another object of the invention to provide a bias control circuit which is capable of being rapidly enabled from a shutdown condition to immediately produce a needed bias current, and which is particularly useful in rapidly biasing up a high speed CMOS amplifier or other electronic circuit from a disabled, low-power condition.
It is another object of the invention to provide a bias control circuit which is capable of being rapidly enabled from a shutdown condition to immediately provide a needed bias current, and which is particularly useful in conjunction with high speed CMOS amplifiers, especially in CMOS operational amplifiers used in high speed video multiplexing applications.
It is another object of the invention to provide a bias control circuit which is capable of being rapidly enabled from a shutdown condition to immediately provide a needed bias current, and which is particularly useful in conjunction with high speed CMOS amplifiers utilized in fast voltage regulators.
It is yet another object of the invention to provide a quick turn-on bias control circuit which does not require a long settling time after predetermined bias levels are achieved.
Briefly described, and in accordance with one embodiment thereof, the invention provides a disable/enable bias control circuit (
1
) that disables bias circuitry (M
22
) of an electronic circuit by interrupting a compensated feedback loop in a bias control circuit. The feedback loop, when enabled, causes the disable/enable bias control circuit to produce a predetermined bias voltage (V
BIAS+
) which is applied to the bias circuitry (M
22
). A trickle charging current is conducted into a compensation capacitor of the feedback loop while the bias circuitry is disabled, in order to charge the compensation capacitor to a predetermined threshold voltage which causes the feedback loop and bias control circuit (
1
), when they are enabled, to produce the predetermined voltage needed by the bias circuitry to bias the electronic circuit (
18
) for normal operation. The feedback loop then is enabled, and the compensation capacitor is already precharged to the predetermined voltage, the electronic circuit is very quickly enabled from the disabled condition.
In one embodiment, the disable/enable bias control circuit (
1
) includes a reference voltage circuit (
2
) having an internal feedback loop and a compensation capacitor (C
0
) of the feedback loop, wherein the voltage reference circuit is operative, when enabled, to produce a bias voltage having a predetermined value (V
BIAS+
). A shutdown circuit (M
11
& M
3
) is coupled to the reference voltage circuit and is operative in response to a first level of a control signal (V
SHUTDOWN
) to disable the reference voltage circuit and also to disable the feedback loop. A trickle charging circuit (
3
) is coupled to a terminal of the compensation capacitor and is responsive to the first level of the control signal (V
SHUTDOWN
) to produce a trickle charging current into the compensation capacitor to maintain a voltage across the compensation capacitor at a predetermined value which enables the feedback loop to very rapidly cause the reference voltage circuit to produce the predetermined value (V
BIAS+
) of the bias voltage. A bias circuit transistor (M
22
) of a bias circuit controlled by the disable/enable bias control circuit (
1
) includes a source coupled to a supply voltage conductor (V
DD
), a gate coupled to receive the predetermined value (V
BIAS+
) of the bias voltage, and a drain supplying a bias current I
BIAS+
to an electronic circuit (
18
). The disable/enable bias control circuit includes a shutdown control circuit (
15
) which produces the control signal (V
SHUTDOWN
). The shutdown control circuit (
15
) includes an input terminal (
80
) and an output that produces the first level (LOW) of the shutdown signal in response to an external signal applied to the input terminal. The trickle charging circuit (
2
) includes a very high resistance circuit coupled between the supply voltage conductor and a threshold circuit (M
26
,Q
13
) to establish a trickle control current, a trickle current output transistor (M
25
) having a gate coupled to the threshold circuit, and a source coupled to the terminal of the compensation capacitor (C
0
). A trickle current produced by the trickle circuit output transistor (M
25
) precharges the compensation capacitor to a voltage determined by the threshold circuit.


REFERENCES:
patent: 5065055 (1991-11-01), Reed
patent: 5578956 (1996-11-01), Rossi et al.
patent: 6057721 (2000-05-01), Nolan et al.
patent: 6118263 (2000-09-01), O'Neill et al.
patent: 6177825 (2001-01-01), Nayebi et al.

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