Queuing packets written to memory for switching

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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C370S429000, C370S412000

Reexamination Certificate

active

10360079

ABSTRACT:
A system for queuing packets written to memory for switching includes a data memory logically divided into multiple blocks. The system also includes multiple input ports each operable to receive packets and write the packets to the data memory. The system also includes multiple output ports each having a memory structure and one or more output queue pointers. The memory structure includes multiple memory structure entries that each correspond to one of the blocks. Each of the memory structure entries includes a memory structure next pointer that can link to another one of the memory structure entries. An output queue pointer can link to one of the memory structure entries, and the output queue pointers and memory structure next pointers form output queue linked lists. Each of the output ports can read packets stored in the data memory using the output queue linked lists and communicate the packets.

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