Queue partitioning mechanism

Details Queue partitioning mechanism Queue partitioning mechanism

2007-02-20

2007-02-20

Tung, Kee M. (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

C345S520000, C345S535000

Reexamination Certificate

active

10795939

ABSTRACT:
According to one embodiment a chipset is disclosed. The chipset includes a graphics accelerator, a memory controller and a queue mechanism. The queue mechanism includes a first functional unit block (FUB) coupled to the graphics accelerator, and a second FUB coupled to the memory controller.

REFERENCES:
patent: 4873703 (1989-10-01), Crandall et al.
patent: 6134638 (2000-10-01), Olarig et al.
patent: 6184907 (2001-02-01), Min
patent: 6208703 (2001-03-01), Cavanna et al.
patent: 6532019 (2003-03-01), Gulick et al.

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