Queue pair wait state management in a host channel adapter

Details Queue pair wait state management in a host channel adapter Queue pair wait state management in a host channel adapter

2005-04-26

2005-04-26

Vanderpuye, Kenneth (Department: 2661)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S235000, C370S450000, C709S250000, C710S058000, C710S117000

Reexamination Certificate

active

06885673

ABSTRACT:
A host channel adapter configured for outputting packets according to InfiniBand™ protocol includes a queue pair attributes table having queue pair entries configured for specifying attributes of the respective queue pairs. Each queue pair entry includes a timestamp field for storing a time value. Upon teardown of a queue pair, a management agent stores a timestamp value, according to a prescribed time resolution interval, within the timestamp field and sets a corresponding wait state bit. The queue pair attributes table is accessed each prescribed time resolution interval for identification of idle queue pairs having passed a minimum idle interval at least equal to the prescribed time resolution interval. If an identified idle queue pair has a corresponding timestamp value indicating passing of the minimum time idle interval, the corresponding wait state bit is reset enabling the queue pair to be reused.

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Mellanox Technologies Inc., “Understanding PCI Bus, 3GIO and InfiniBand Architecture”, Dec. 2001, White Paper Doc# WP120501100, pp. 1-8.*
Pendery et al., “InfiniBand Architecture: Bridge Over Troubled Water”, Apr. 2000, Illuminata Inc., pp. 1-8.*
Daniel Cassiday, InfiniBand™ Architecture Tutorial; Hot Chips, Aug. 2000, Sun Microsystems.

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