Queue control method and system

Details Queue control method and system Queue control method and system

2006-01-24

2006-01-24

Pezzlo, John (Department: 2662)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S230100

Reexamination Certificate

active

06990115

ABSTRACT:
A queue control system and method for scheduling fixed size traffic elements for transmission on a link from a number of queues. The system comprises a memory, queues and queue processor. The memory stores a linear array, where each array index corresponds to a transmission priority and is capable of referencing a list of queues. Each queue has an assigned weight and an associated calculation remainder variable stored in a memory. Queues referenced by a low value array index are selected for transmission before queues referenced by higher value array index. The queue processor is arranged so that to repetitively select a queue for transmission in dependence on the referenced position of the queue in the array, and to operate a predetermined function for moving the reference to a queue selected for transmission to a new array index.

REFERENCES:
patent: 5541912 (1996-07-01), Choudhury et al.
patent: 5764641 (1998-06-01), Lin
patent: 5831971 (1998-11-01), Bonomi et al.
patent: 5864540 (1999-01-01), Bonomi et al.
patent: 5901139 (1999-05-01), Shinohara
patent: 5901147 (1999-05-01), Joffe
patent: 6011775 (2000-01-01), Bonomi et al.
patent: 6014367 (2000-01-01), Joffe
patent: 6034945 (2000-03-01), Hughes et al.
patent: 6044060 (2000-03-01), Jones
patent: 6049527 (2000-04-01), Isoyama et al.
patent: 6076112 (2000-06-01), Hauser et al.
patent: 6081504 (2000-06-01), Tanaka et al.
patent: 6091708 (2000-07-01), Matsunuma
patent: 6091725 (2000-07-01), Cheriton et al.
patent: 6317416 (2001-11-01), Giroux et al.
patent: 6359861 (2002-03-01), Sui et al.
patent: 6396843 (2002-05-01), Chiussi et al.
patent: 6496516 (2002-12-01), Dabecki et al.
patent: 6590900 (2003-07-01), Peting et al.
patent: 6721325 (2004-04-01), Duckering et al.
patent: 6724767 (2004-04-01), Chong et al.
patent: 6728792 (2004-04-01), Wagner
Jennifer L. Rexford et al., “Hardware-Efficient Fair Queueing Architectures for High-Speed Networks” IEEE 1996, pp. 638-647.
H. Jonathan Chao, “A Novel Architecture for Queue Management in the ATM Network”, IEEE 1991, pp. 1110-1118.
Manolis Katevenis et al., “Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip”, IEEE 1991, pp. 1265-1279.
Hanoch Levy, “Allocation of Server Time Among Multiple ATM Sessions: the Use of Fair Queuing”, Dec. 10, 1997, p. 1-12.

Affiliated with

Also associated with

Rating

Queue control method and system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Queue control method and system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Queue control method and system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3569484