Quaternary-ternary semiconductor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Having graded composition

Reexamination Certificate

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Details

C257S190000, C257S192000, C257S194000

Reexamination Certificate

active

06818928

ABSTRACT:

TECHNICAL FIELD
This invention relates to semiconductor devices, and more particularly to semiconductor devices having III-V substrates.
BACKGROUND
As is known in the art, for high quality semiconductor devices, such as field effect transistor (FET) devices, the critical active layers of such devices must lattice-match the underlying substrate to prevent the formation of active device degrading dislocations. This requirement is severe since even a 1% lattice mismatch can cause dislocations and there are few lattice matching material combinations available to the designer. An approach that relieves this requirement is to insert a metamorphic buffer layer between the substrate and critical active device layers. The metamorphic buffer layer is used to alter the lattice constant from that of the substrate. The defects and dislocations necessarily formed in the metamorphic buffer layer to transform the lattice constant are primarily confined to the buffer layer. Subsequently the active device layers are grown on top of a material, i.e., the metamorphic buffer layer, with a new lattice constant.
More particularly, a metamorphic buffer layer grown on a GaAs substrate is used to expand the lattice constant from that of the GaAs crystal substrate thereby enabling the growth of high quality active device structures which are not possible with direct growth on such GaAs substrates. This metamorphic buffer layer is typically an arsenide alloy containing aluminum, gallium, and indium. The concentration of indium is increased during growth to expand the lattice constant. Typically, current practice is to use an In
x
Al
1−x
As or quaternary In
x
(Al
y
Ga
1−y
)
1−x
As alloys. (The GaInAs ternary alloy is not used because its low bandgap results in electrically leaky buffer layers.) Two problems are encountered with this current practice. With the highly resistive ternary AlInAs buffer layer, the growth must start with a very high aluminum concentration (approximately 95%). The indium concentration is then ramped up while the aluminum concentration is ramped down. The high aluminum concentration roughens the surface morphology which can degrade device performance. With the quaternary AlGaInAs buffer layer, lower aluminum concentrations (approximately 40%) can be used at the start of the growth due to the presence of gallium which smoothens the surface. However, by the end of the compositional ramp, the bandgap of the AlGaInAs material is significantly reduced by the indium and gallium concentrations thereby reducing desireable insulating characteristics of the layer. This problem becomes increasingly severe for indium concentrations greater than 50%.
Thus, since AlAs and GaAs lattice match to 0.1%, the lattice constant is expanded by incorporating indium. During metamorphic buffer layer growth, the indium concentration is increased either linearly or step-fashion, necessarily forming dislocations as the lattice constant expands. When properly grown, the dislocations are predominantly contained in the buffer layer and do not extend into the material grown on top of the buffer layer. A common example is to grade the indium concentration to 52%, giving In
0.52
Al
0.48
As or In
0.52
(Al
y
Ga
1−y
)As. This composition has a lattice constant matching InP. Consequently device structures previously grown on expensive and fragile InP substrates can be grown on GaAs substrates.
The conventional practice for arsenide-based metamorphic buffer layers uses AlInAs or AlGaInAs alloys. As noted above, a problem with AlInAs is the surface morphology of the metamorphic buffer is rougher than with AlGaInAs. AlInAs is an alloy of AlAs and InAs. Material quality of AlAs is improved at high growth temperatures (700C) whereas InAs is improved at low temperatures (400C). Consequently in ramping the AlI/In composition from high/low to low/high a complicated temperature ramp is used with limited success in smoothening the surface. A problem with using AlGaInAs in the buffer layer is that the resistivity of the layer and consequently its isolating properties decreases as the indium concentration is ramped up. Low growth temperatures are often used to improve the resistivity by introducing traps or defects into the material. However, these layer imperfections may degrade device layers grown on top of the buffer layer.
One method used to provide a metamorphic buffer layer is illustrated for the growth of InP-type device structure on a GaAs substrate by using 52% indium concentration in the buffer layer. Other indium concentrations and device structures are possible. The specific example of a layer structure of the metamorphic includes: a GaAs substrate; a GaAs buffer on the substrate; a 1.62 &mgr;m metamorphic buffer layer linearly indium graded over a thickness of 1.5 &mgr;m from In0.06Al0.40Ga0.54As at the bottom (i.e., on the GaAs buffer) to In0.56Al0.40Ga0.04As followed by 0.12 &mgr;m grading to In0.52Al0.48As at the top of the metamorphic buffer layer; and a 1000 Å In
0.52
Al
0.48
As layer on the metamorphic buffer layer. It is understood that the metamorphic buffer layer is typically between 1.0 and 1.8 &mgr;m thick. The active device layers are then formed on the In
0.52
Al
0.48
As layer.
SUMMARY
In accordance with the present invention, a semiconductor structure is provided having a III-V substrate, a buffer layer over the substrate, such buffer layer having a compositionally graded quaternary lower portion and a compositionally graded ternary upper portion.
In one embodiment, the lower portion of the buffer layer is compositional graded AlGaInAs and the upper portion is compositional graded AlInAs.
In one embodiment, the lower portion of the buffer layer has approximate concentrations of 5% indium, 40% aluminum, and 55% gallium, (i.e., Al0.40In0.05Ga0.55As This concentration of aluminum insures good layer resistivity while the gallium concentration smoothens the surface.
In one embodiment, the indium concentration is increased (i.e., ramped up) and the gallium concentration is decreased (i.e., ramped down) from a bottom of the lower portion to a top of the lower portion of the buffer layer. At an indium concentration of approximately 25-35%, the gallium is terminated and a ternary AlInAs upper layer is grown. The resistivity of Al0.7In0.3As is very good with satisfactory smoothness. The indium concentration is then ramped up toward the final desired composition.
In a preferred embodiment, the indium concentration is graded 3-10% beyond the desired final indium concentration to relax residual strain. From this compositional overshoot, the indium concentration is then ramped back down to the final indium concentration. This grading approach results in excellent buffer layer resistivity with good surface smoothness for the commonly used 52% indium concentration.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.


REFERENCES:
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patent: 5592501 (1997-01-01), Edmond et al.
patent: 5770868 (1998-06-01), Gill et al.
patent: 6107652 (2000-08-01), Scavennec et al.
patent: 6130147 (2000-10-01), Major et al.
patent: 6342405 (2002-01-01), Major et al.
patent: 2002/0149032 (2002-10-01), Ouchi et al.
patent: 2002/0150137 (2002-10-01), Beam, III et al.
patent: 2002/0185655 (2002-12-01), Fahimulla et al.
patent: 1249906 (2002-12-01), None

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