Quasi-differential bus

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307354, 307475, 375 76, H03K 14003

Patent

active

053151755

ABSTRACT:
A digital data bus provides common-mode noise immunity equal to approximately one-half that of a fully differentially driven and received bus. For a data bus having n data lines, n+1 lines are provided, the n+1th line being a reference voltage line. The data and reference lines are driven by drivers having similar impedance characteristics. The reference line is received by a line receiver having impedance characteristics similar to the differential receivers of the data lines. The data line receivers have one differential input connected to respective data lines and the other differential input connected to the output of the reference line receiver. The reference line is routed with the data lines to ensure induced signals are common-mode, but spaced therefrom to reduce cross-talk.

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patent: 5056110 (1991-10-01), Fu et al.
patent: 5220211 (1993-06-01), Christopher et al.
"MECL System Design Handbook", 4th Ed., William R. Blood, Jr., Motorola Semiconductor Products, Inc., 1988, pp. 70-76.

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