Quantized feedback analog to digital converter with offset volta

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324 99D, 340347AD, 340347M, H03K 1302

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active

041647335

ABSTRACT:
Analog to digital converter of the type in which an analog input signal is integrated and charge is applied to the integrating capacitor in predetermined measured quantities to offset or balance the effect of the input signal. A counter is incremented and decremented in accordance with the balancing charge to provide a count corresponding to the input signal. Means is included for eliminating errors due to offset voltages and imperfections in the virtual ground of the integrator, and the operating level of the integrator during a conversion is set independently of the sources which supply the balancing charge.

REFERENCES:
patent: 3566265 (1971-02-01), Reid
patent: 3654560 (1972-04-01), Cath et al.
patent: 3872466 (1975-03-01), Wold
patent: 3942174 (1976-03-01), Dorey et al.
Staff of Teledyne Semiconductors, CMOS Converter With Charge Balancing, New Electronics, vol. 8, No. 24, pp. 30-31, Dec. 9, 1975.

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