Quadrature signal demodulation using quantizing and accumulating

Details Quadrature signal demodulation using quantizing and accumulating Quadrature signal demodulation using quantizing and accumulating

1995-12-22

1997-04-22

Grimm, Siegfried H.

Demodulators

Frequency shift keying or minimum shift keying demodulator

Input signal combined with local oscillator or carrier...

329306, 375328, 375340, H07L 2714

Patent

active

056232250

ABSTRACT:
A demodulator (18) which receives digital representations of a received signal converts those signals into analog signals (53) in a pair of multiplying analog-to-digital converters (MDACs) (21, 22) The analog signals are then combined in combiner (26) by subtracting the first analog signal from the second analog signal (54). The summed signal is normalized (55) in quantizer (27). The output from the quantizer (27) is accumulated (56) in an n-bit accumulator (28) as regulated by a clock input (Fclock). The output of the accumulator (28) is used as a programming input (57) to the MDACs (21, 22).

REFERENCES:
patent: 4799214 (1989-01-01), Kaku
patent: 5128966 (1992-07-01), Bang
patent: 5162798 (1992-11-01), Yundt
patent: 5345188 (1994-09-01), Owen
patent: 5349353 (1994-09-01), Zrilic
patent: 5448202 (1995-09-01), Owen

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