Quadrature modulation transmitter

Pulse or digital communications – Transmitters – Quadrature amplitude modulation

Reexamination Certificate

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C375S295000, C455S067150, C332S104000

Reexamination Certificate

active

10734574

ABSTRACT:
There is provided a quadrature modulation transmitter which is capable of solving several problems of the conventional transmitter while performing the same function as the heterodyne transmitter or the digital IF transmitter, in which a circuit structure is simplified and a power consumption is reduced compared with the conventional transmitter. The quadrature modulation transmitter includes: a digital processing block for receiving an I-channel data, a Q-channel data and a clock signal, modulating the I-channel data or an inverted I-channel data into a first analog signal by means of an I-channel DAC according to a switching of an I-clock signal identical to the clock signal, and modulating the Q-channel data and an inverted Q-channel data into a second analog signal by means of a Q-channel DAC according to a switching of a Q-clock signal, the Q-clock signal being an inverted clock signal; and an analog processing block for receiving the first and second analog signals from the digital processing block, adding the first and second analog signals, converting the added signal into an RF domain signal through a mixing operation, and amplifying and transmitting the RF domain signal.

REFERENCES:
patent: 6240142 (2001-05-01), Kaufman et al.
patent: 6507625 (2003-01-01), Iwamatsu et al.
patent: 2003/0118126 (2003-06-01), Moon et al.
patent: 2004/0146118 (2004-07-01), Talwalkar et al.
patent: 2004/0232985 (2004-11-01), Itahara
A VLSI Architecture for a High-Speed All-Digital Quadrature Modulator and Demodulator fo rDigital Radio Applications, H. Samueli, et al., IEEE Journal , vol. 8, No. 8, Oct. 1990, pp. 1512-1519.
“A Digital Quadrature Modulator With On-Chip D/A Converter”, J. Vankka, IEEE Journal of Solid-state Circuits, vol. 38, No. 10, Oct. 2003, pp. 1635-1642.

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