Quad flat non-leaded package comprising a semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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Details

C257S676000

Reexamination Certificate

active

07119421

ABSTRACT:
A semiconductor package is proposed. The semiconductor package includes a discrete semiconductor chip on a die pad, a plurality of bond pads situated next to the chip and formed with a plurality of connecting mechanisms and an encapsulant for encapsulating the chip and the pads. In a preferred embodiment the die pad and/or the bond pads comprise means for vertically and laterally interlocking the pads to the encapsulant. The interlocking means of the bond pads and the die pad significantly enhance the bonding strength between the pads and the encapsulant for preventing delamination or cracking, so that quality and reliability of the quad flat non-leaded semiconductor package comprising a discrete can be assured.

REFERENCES:
patent: 6201292 (2001-03-01), Yagi
patent: 6483178 (2002-11-01), Chuang
patent: 6767753 (2004-07-01), Huang
patent: 2002/0027273 (2002-03-01), Huang
patent: 2002/0063257 (2002-05-01), Wang
patent: 2002/0119603 (2002-08-01), Tani
patent: 0 794 572 (1997-09-01), None
patent: 10313082 (1998-11-01), None

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