QPSK demodulator for obtaining phase by arithmetic operation

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

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375329, 375340, 375324, 329345, 329315, 370203, 370204, H03D 100, H03D 300, H04L 2714

Patent

active

058987398

ABSTRACT:
A QPSK demodulator that is smaller in size and lower in cost by restricting a storage capacity needed for a TAN.sup.-1 ROM to a minimum. Values of I and Q channel base band signals obtained by converting and quantizing a received signal are approximated to a nearest one of values on (2.sup.N-3 +1) segment lines represented by Q=(n/2.sup.N-3)I, where n=0, 1, . . . , 2.sup.N-3, with a phase accuracy of positive N bits. Data corresponding to the approximated segment line is previously stored in a TAN.sup.-1 ROM as phase arithmetic data. An address decoder converts each base band signal into an address. An arithmetic circuit obtains phase data, for obtaining a QPSK demodulated signal, by performing a predetermined arithmetic operation, which is commensurate with the size of I and Q channel base band signals, on phase arithmetic data stored in the TAN.sup.-1 ROM in association with the converted address.

REFERENCES:
patent: 4796188 (1989-01-01), Gale et al.
patent: 5504453 (1996-04-01), MacDonald et al.
patent: 5627861 (1997-05-01), Kataoka et al.
patent: 5640417 (1997-06-01), Barabash et al.

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