QOS aware expansion mechanism

Details QOS aware expansion mechanism QOS aware expansion mechanism

2004-09-13

2011-10-11

Shah, Chirag (Department: 2477)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S401000

Reexamination Certificate

active

08036228

ABSTRACT:
In a data communication system comprising a plurality of peripherals having respective interfaces, the interfaces having device drivers and being coupled to a common bus for communication with a management system, the interfaces having different real time requirements; an ATM SAR and scheduler employs a predefined PHY level interface with different levels of service, the PHY interface being used as a QOS (Quality of Service) aware common master-slave bus for the peripherals which act as slave devices, whereby respective device driver requirements can be simplified or eliminated. A predefined PHY level interface is the ATM Forum UTOPIA, each peripheral being addressed as a separate UTOPIA slave port. The invention discloses how a system required to support interfaces with differing real time requirements may be supported through the use of a common bus.

REFERENCES:
patent: 5193088 (1993-03-01), Choi et al.
patent: 5237569 (1993-08-01), Sekihata et al.
patent: 5351043 (1994-09-01), Hullett et al.
patent: 5524254 (1996-06-01), Morgan et al.
patent: 5600645 (1997-02-01), Boyer et al.
patent: 5771350 (1998-06-01), Kim
patent: 5841777 (1998-11-01), Cohen
patent: 5920561 (1999-07-01), Daniel et al.
patent: 5933425 (1999-08-01), Iwata
patent: 5940370 (1999-08-01), Curtis et al.
patent: 5982748 (1999-11-01), Yin et al.
patent: 5999518 (1999-12-01), Nattkemper et al.
patent: 6088355 (2000-07-01), Mills et al.
patent: 6104721 (2000-08-01), Hsu
patent: 6157614 (2000-12-01), Pasternak et al.
patent: 6185197 (2001-02-01), Cheung Yeung et al.
patent: 6195346 (2001-02-01), Pierson, Jr.
patent: 6195714 (2001-02-01), Li et al.
patent: 6212163 (2001-04-01), Aida
patent: 6331987 (2001-12-01), Beser
patent: 6535505 (2003-03-01), Hwang et al.
patent: 6538987 (2003-03-01), Cedrone et al.
patent: 6538992 (2003-03-01), Subbiah et al.
patent: 6556542 (2003-04-01), Sudo et al.
patent: 6560196 (2003-05-01), Wei
patent: 6643288 (2003-11-01), Santhanakrishnan
patent: 6804227 (2004-10-01), Sone et al.
patent: 6937566 (2005-08-01), Forslow
Compaq, Intel, Microsoft and NEC; “Universal Serial Bus Specification” Revision 1.1; Sep. 23, 1998.
IEEE Std 1394-1995, “IEEE Standard for a High Performance Serial Bus,” 1995.

Affiliated with

Also associated with

Rating

QOS aware expansion mechanism does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with QOS aware expansion mechanism, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and QOS aware expansion mechanism will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4298563