QAM de-mapping circuit

Details QAM de-mapping circuit QAM de-mapping circuit

1998-08-03

2001-05-01

Tse, Young T. (Department: 2734)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S332000, C329S304000, C714S791000

Reexamination Certificate

active

06226333

ABSTRACT:

DESCRIPTION
The invention relates to a QAM de-mapping circuit. More particularly, it relates to a QAM de-mapping circuit used in a receiver according to the digital multi-programme system for television, sound and data services for cable distribution.
A draft for an European Telecommunication Standard (ETS) has been produced in August 1994 under the authority of the Joint Technical Committee (JTC) of the European Broadcasting Union (EBU) and the European Telecommunications Standards Institute (ETSI). This draft ETS describes modulation, channel coding and framing structure for digital multi-programme television by cable. It is based on the studies carried out by the European Digital Video Broadcasting (DVB) project.
According to this draft ETS the cable system is defined as functional block of equipment and the following process is applied as shown in FIG.
3
.
FIG. 3
shows the conceptual block diagram of elements at the cable head-end and the receiving site.
In the cable head-end a baseband interface
31
serves as connection to local MPEG-2 program sources, contribution links, re-multiplexers, etc.. This data is sent in MPEG-2 transport mux packets to a base band physical interface
32
that adapts the data structure to the format of the signal source and performs a synchronization in accordance with a clock signal. Here, the framing structure is in accordance with MPEG-2 transport layer including sync bytes.
Thereafter, the Sync 1-Byte is inverted according to the MPEG-2 framing structure in a Sync 1 inversion & randomization circuit
33
that also randomizes the data stream for spectrum shaping purposes. The resulting data stream has a width of 8 bit and is led to a Reed-Solomon coder
34
that applies a shortened Reed-Solomon code to each randomized transport packet to generate an error-protected packet. This code is also applied to the sync byte itself. Thereafter, a convolutional interleaver
35
performs a depth I=12 convolutional interleaving of the error-protected packets. Here, the periodicity of the sync bytes remains unchanged.
The bytes generated by the interleaver
35
are converted into QAM symbols in a byte to m-tuple conversion stage
36
. The resulting output signal has a width of m bit. In order to get a rotation-invariant constellation, a differential encoding stage
37
following thereafter applies a differential encoding of the two Most Significant Bits (MSBs) of each symbol.
The final stage in the cable head-end is a QAM modulation and physical interface
38
that performs a square-root raised cosine filtering of the I and Q signals prior to QAM modulation. This is followed by interfacing the QAM modulated signal to a Radio-Frequency (RF) cable channel
40
.
All devices
33
to
38
are synchronized and/or controlled by a clock & sync generator
39
that is receiving the same clock signal as the baseband physical interface
32
and additionally a control signal of the Sync 1 inversion & randomization circuit
33
.
The cable receiver performs the inverse signal processing, as described for the modulation process above, in order to recover the baseband signal.
Therefore, the signal from the RF cable channel
40
is received by a RF physical interface & QAM demodulation circuit
41
that sends a control signal to a carrier & clock & sync recovery circuit
49
synchronizing and/or controlling all circuits of the cable receiver and the QAM demodulated signal to a matched filter & equalizer circuit
42
.
The output signal from the matched filter & equalizer circuit
42
has a width of m bit and is sent to a differential decoder
43
, whereafter it undergoes a symbol to byte mapping in a symbol to byte mapping circuit
44
. Here, the output signal has a width of 8 bit.
The next stage is a convolutional deinterleaving in a convolutional deinterleaver
45
. The convolutional deinterleaved, but still error-protected packets pass through a Reed-Solomon decoder
46
and a Sync 1 inversion & energy dispersal removal circuit
47
before they reach a baseband physical interface
48
that produces MPEG-2 transport mux packets according to the local MPEG-2 programme sources, contribution links, remultiplexers, etc. and a clock signal.
As the present invention mainly concerns the differential decoding in the cable receiver, the following description will be only directed to this stage and the corresponding stage in the cable head-end.
In the cable head-end, after the byte to symbol mapping, the two significant bits of each symbol will then be differentially coded in order to obtain a &pgr;/2 rotation-invariant QAM constellation. The differential encoding of the two MSBs shall be given by the following expression:
I
k
=
(
A
k
⊕
B
k
)
_
·
(
A
k
⊕
I
k
-
1
)
+
(
A
k
⊕
B
k
)
·
(
A
k
⊕
Q
k
-
1
)
Q
k
=
(
A
k
⊕
B
k
)
_
·
(
B
k
⊕
Q
k
-
1
)
+
(
A
k
⊕
B
k
)
·
(
B
k
⊕
I
k
-
1
)
.
FIG. 4
gives an example of the implementation of the byte to symbol conversion. In the example shown in
FIG. 4
, 8 bits parallel supplied to the byte to m-tuple conversion circuit
36
from the convolutional interleaver
35
partially undergo a differential encoding in the differential encoder
37
before being supplied to a mapping circuit
37
b
that belongs to the differential decoder
37
. Only the most significant bits A
k
, B
k
at the output of the byte to m-tuple converter
36
are led to the differential encoder
37
. The differential encoder
37
then produces the most significant bits Q
k
, I
k
of the in-phase and quadrature phase components of the modulated signal. The mapping circuit
37
b
also receives the lower q bits of the byte to m-tuple conversion. For 16-QAM q equals to 2, for 32-QAM q equals to 3 and for 64-QAM q equals to 4. The mapping circuit
37
b
outputs the in-phase component I and the quadrature component Q.
The modulation of the system is a quadrature amplitude modulation (QAM) with 16, 32, or 64 points in the constellation diagram.
The system constellation diagrams for 16-QAM, 32-QAM and 64-QAM are given in
FIG. 5
a
to
c
, respectively, assuming that I
k
and Q
k
are the two MSBs in each quadrant. As shown in
FIG. 5
, the constellation points in quadrant 1 shall be converted to quadrants 2, 3 and 4 by changing the two MSBs (i.e. I
k
and Q
k
) and by rotating the q LSBs according to the following rule given in Table 1.
TABLE 1
Quadrant
MSBs
LSBs rotation
1
00
2
10
+&pgr;/2
3
11
+&pgr;
4
01
+3&pgr;/2
The differential decoder
43
simply serves to perform the signal processing inverse to that described above. A unit combining a conventional de-mapping circuit and a conventional differential decoder is shown in FIG.
6
.
In
FIG. 6
a n bit signal arrives at a four quadrant demapper
50
to assign the data bit values shown in
FIG. 5
to received signal amplitudes. The n bits output by the four quadrant demapper
50
are split up into two MSBs which undergo a differential decoding in a differential decoder
1
and n−2 LSBs. After the differential decoding, the two MSBs are recombined with the n−2 LSBs, before n bit are given out to the symbol to byte mapping circuit
44
.
The conventional four quadrant demapper
50
uses a look-up table, which must have the size 2
n
times n bit. For 64-QAM is n=6 and the size of the look-up table is 2
6
·6=64·6=384 bits.
It is the object of the invention to provide a QAM-demapping circuit, responsible for the differential decoding, that has a simple structure and a reduced size for the look-up table.
This object is solved by a QAM de-mapping circuit, comprising a differential decoder to perfom a differential decoding of 2 Bits of each n Bit symbol received, characterized by a rotator to derotate the other n−2 Bits of each n Bit symbol received into the first quadrant on the basis of the 2 Bits of each n Bit symbol supplied to the differential decoder, and a single quadrant demapper to assign data bit values to received signal amplitudes on the bas

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