Q enhancement circuit and method

Wave transmission lines and networks – Negative resistance or reactance networks of the active type – Having negative impedance

Reexamination Certificate

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Details

C333S213000, C333S216000

Reexamination Certificate

active

10864158

ABSTRACT:
A Q enhancement circuit and method. In a most general embodiment, the inventive circuit is adapted for use with a component having a parasitic resistance R3and a first resistance R1disposed in series with the component and an arrangement for making the resistance a negative resistance. In the illustrative embodiment, first and second inductors constitute the components for which Q enhancement is effected. A resistance R1is disposed in series with the first inductor and is equal to the parasitic resistance RL1thereof. Likewise, a second resistance R2is disposed in series with the second inductor and is equal to the parasitic resistance RL2thereof. The Q enhancement circuit further includes a first transistor Q1and a second transistor Q2.

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patent: 1 282 227 (2003-02-01), None
patent: 11-330851 (1999-11-01), None

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