PWM controller having off-time modulation for power converter

Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter

Reexamination Certificate

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Details

C323S284000

Reexamination Certificate

active

06545882

ABSTRACT:

FIELD OF INVENTION
The present invention relates to switching mode power converter. More particularly, the present invention relates to the pulse width modulation (PWM) of the switching mode power converter.
BACKGROUND OF THE INVENTION
The PWM is a traditional technology that is used in the switching mode power converter to control the output power and achieves the regulation. Most of the equipments, such as mobile phone, TV game, and computer etc. are using PWM power converters to supply power and charge battery. Based on the restriction of environmental pollution, the computer and other equipment manufactures have been striving to meet the power management and energy conservation requirements. The embodiment of power management is to manage the system only consuming the power during the operation. And only a little quantity of power is consumed during non-operation mode. With respect to the power supply in a power management application, saving power in the no load or light load conditions is a major requirement. According to the invention, the object of the off-time modulation for the PWM control is to reduce the power consumption in light load and no load conditions.
FIG. 1
shows a circuit schematic of the flyback power converter, in which a PWM controller
100
controls the power output and achieves the regulation. A transistor
510
switches a transformer
400
. When the transistor
510
is turned off, the leakage inductance of transformer
400
keeps the current, which has been flowing in it constantly for some short time. The part that current continues to flow into the slowly off-switching transistor
510
, and the rest of that current flows into a capacitor
560
through a diode
520
. A resistor
620
dissipates the energy that is charged in the capacitor
620
. The diode
520
, resistor
620
, and capacitor
560
form a snubber circuit to reduce the leakage inductance spike and avoid the transistor
510
breakdown. At the instance of transistor
510
is switched on and an output rectifier
530
is switched off, there is an exponentially decaying oscillation or a ‘ring’ will come out. The ring is at a frequency determined by the inherent capacity of the off-switching rectifier
530
and the secondary inductance of the transformer
400
. The amplitude and duration of the ring are determined by the output current and the reverse recovery times of the rectifier
530
. The ring will cause RFI problem and can easily be eliminated by a snubber resistor
630
and a snubber capacitor
570
across the output rectifier
530
. The major issues for the loss of the power conversion in the light load are illustrated as follows:
(1) The switching loss of the transistor
510
, P
Q
can be expressed (t
ol
/T) (∫
0
tol
V
Q
×Ip dt), where T is switching period, and t
ol
is the duration of overlap of voltage V
Q
and current Ip. Ip is the primary current of the transformer
400
and V
Q
is the voltage across the transistor
510
.
(2) The switching loss of output rectifier
530
, P
D
can be expressed (t
rr
/T) (∫
0
trr
Vd×Id dt), where t
rr
is the reverse recovery time of the rectifier. The Vd is the voltage across the rectifier when it is switched off. The Id is limited by the secondary inductance of the transformer
400
.
(3) The core loss of transformer
400
, P
T
, it is in direct proportion to flux density Bm, core volume Vv and the switching period T. P
T
=K
0
×Bm×Vv/T, where K
0
is a constant that is determined by the material of the core and etc.
(4) The power loss of the snubber, P
R
is stated as P
R
=(1/2)×C×Vd
2
/T, where C is the capacitance of the snubber, such as capacitor
570
.
(5) The power loss of leakage inductance, P
L
can be stated by P
L
=(1/2)×Lt×Ip
2
/T, where the Lt is the primary leakage inductance of transformer
400
. The resistor
620
dissipates the energy that is produced by the Lt.
We can find that all of the losses are indirectly proportional to the switching period T. Increase of the switching period T can reduce the power losses. However the power conversion is restricted to operate in a short switching period to shrink the size of power converter. To prevent the saturation of the transformer, the voltage-time ratio (Vin×Ton) has to be controlled to limit the flux density Bm of the transformer. It is given by
Bm=
(
Vin×Ton
)/(
Np×Ae
)  (1)
where Vin is the input voltage of the power converter, Ton is the on-time of the switching period, Np is the primary turn number of the transformer, Ae is the cross area of the transformer. The value of (Np×Ae) represents the size of the transformer. A short switching period can earn a shorter Ton and a smaller transformer.
Take the flyback power converter as an example; the output power Po is equal to the [1/(2×T)]×Lp×Ip
2
, where Lp is the primary inductance of the transformer
400
. Due to Ip=(Vin/Lp)×Ton, it can be seen quantitatively as
Po=
(
Vin
2
×Ton
2
)/(2×
Lp×T
).  (2)
This is seen from that equation 2, in the light load condition, Ton is short that obviously allows the switching period T to be expanded. The power consumption of the power converter is dramatically reduced in response to the increase of switching period in the light load and no load condition. Nevertheless, it is unsafe to increase the switching period without limitation. According to the behavior of the transformer that is showed in Equation 1, the transformer may be saturated due to an expanded Ton. A dynamic loading may produce an instant expended Ton. The dynamic loading means the load is instantly changed between the light load and the high load. The saturation of magnetic components, such as inductors and transformer, causes a current surge. The current surge will generate a spike-noise in power converter and also cause an over-stress damage to the switching devices such as transistors and rectifiers.
FIG. 2
shows the circuit schematic of the PWM-controller.
FIG. 3
displays the waveform of the circuit in FIG.
2
. When the switch
25
is turned on by a charge signal IVp, a charge current I
C
charges a capacitor C
T
and once the voltage across the capacitor C
T
reaches the high trip-point V
H
of the comparator
10
, the comparator
10
and the NAND gates
17
,
18
generate a discharge signal Vp to turn on the switch
26
that discharges the capacitor C
T
via a discharge current I
D
. The charge current I
C
and the discharge current I
D
are correlated normally. The phenomenal of the discharge is continuous until the voltage of capacitor C
T
is lower than the low trip-point voltage V
L
, in which a comparator
11
is enabled. The charge current I
C
, the discharge current I
D
, capacitor C
T
, comparators
10
,
11
and the switches
25
,
26
and NAND gates
17
,
18
form a saw-tooth-signal generator and produce a clock signal to clock-on the flip-flop
20
. The comparator
12
resets the flip-flop
20
once the voltage in the pin Vs is higher than the signal
35
, which is attenuated from the feedback signal V
FB
by the resistor R
A
and R
B
. The resistor
610
converts the current information of the transformer
400
to a voltage signal
37
, which is a ramp signal. The input voltage Vin and the inductance of transformer
400
determine the slope of the ramp signal. V
R610
=R
610
×(Vin×Ton)/Lp. The voltage in resistor
610
is the voltage signal
37
, which drives the pin Vs of PWM controller. The feedback signal V
FB
is derived from the output of an optical-coupler
200
via a level shift diode
21
. An error amplifier
300
drives the input of the optical-coupler
200
. The input of the error amplifier
300
is connected to the output of the power converter Vo to develop the voltage feedback loop. Through the control of voltage feedback loop, the voltage of the V
FB
dominantly decides the output powers. The discharge time of capacitor C
T
determines the dead time of the PWM signal
39
that decides

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