PWM buck regulator with LDO standby mode

Details PWM buck regulator with LDO standby mode PWM buck regulator with LDO standby mode

2006-06-20

2006-06-20

Berhane, Adolf (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S283000, C323S282000

Reexamination Certificate

active

07064531

ABSTRACT:
A voltage regulator is disclosed having a PWM portion and an LDO portion on a single chip. The PWM portion switches a large MOS transistor (or synchronous MOS transistors) at a high frequency to supply medium and high currents (e.g., 600 mA) to a load. During a standby mode, the regulator switches to an LDO mode and disables the PWM portion. The LDO mode controls a very small MOS series transistor to supply the standby mode current. Since the gate of the series MOS transistor is small, only a small variation in gate charge is needed to adequately control the conductance of the series transistor during the standby mode. Therefore, much less control current is used by the LDO than if the LDO used a series transistor of the same size as the switching transistor.

REFERENCES:
patent: 5773966 (1998-06-01), Steigerwald
patent: 6150798 (2000-11-01), Ferry et al.
patent: 6229289 (2001-05-01), Piovaccari et al.
patent: 6611132 (2003-08-01), Nakagawa et al.
patent: 6621256 (2003-09-01), Muratov et al.
patent: 6661211 (2003-12-01), Currelly et al.

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